Datasheet
2012-2013 Microchip Technology Inc. DS30009312B-page 363
PIC24FJ128GC010 FAMILY
REGISTER 26-13: ADCHITH: A/D MATCH HIT HIGH REGISTER
R/W-0, HS R/W-0, HS R/W-0, HS R/W-0, HS R/W-0, HS R/W-0, HS R/W-0, HS R/W-0, HS
CHH31 CHH30 CHH29 CHH28 CHH27 CHH26 CHH25 CHH24
bit 15 bit 8
R/W-0, HS R/W-0, HS R/W-0, HS R/W-0, HS R/W-0, HS R/W-0, HS R/W-0, HS R/W-0, HS
CHH23 CHH22 CHH21 CHH20 CHH19 CHH18 CHH17 CHH16
bit 7 bit 0
Legend: HS = Hardware Settable bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 31-0 CHH<31:16>: A/D Conversion Match Hit bits
1 = A threshold compare match has occurred on the corresponding sample list entry
0 = No match has occurred
REGISTER 26-14: ADCHITL: A/D MATCH HIT LOW REGISTER
R/W-0, HS R/W-0, HS R/W-0, HS R/W-0, HS R/W-0, HS R/W-0, HS R/W-0, HS R/W-0, HS
CHH15 CHH14 CHH13 CHH12 CHH11 CHH10 CHH9 CHH8
bit 15 bit 8
R/W-0, HS R/W-0, HS R/W-0, HS R/W-0, HS R/W-0, HS R/W-0, HS R/W-0, HS R/W-0, HS
CHH7 CHH6 CHH5 CHH4 CHH3 CHH2 CHH1 CHH0
bit 7 bit 0
Legend: HS = Hardware Settable bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 31-0 CHH<15:0>: A/D Conversion Match Hit bits
1 = A threshold compare match has occurred on the corresponding sample list entry
0 = No match has occurred