Datasheet

 2012-2013 Microchip Technology Inc. DS30009312B-page 335
PIC24FJ128GC010 FAMILY
24.0 32-BIT PROGRAMMABLE
CYCLIC REDUNDANCY CHECK
(CRC) GENERATOR
The 32-bit programmable CRC generator provides a
hardware implemented method of quickly generating
checksums for various networking and security
applications. It offers the following features:
• User-programmable CRC polynomial equation,
up to 32 bits
• Programmable shift direction (little or big-endian)
• Independent data and polynomial lengths
• Configurable interrupt output
• Data FIFO
Figure 24-1 displays a simplified block diagram of the
CRC generator. A simple version of the CRC shift
engine is displayed in Figure 24-2.
FIGURE 24-1: CRC BLOCK DIAGRAM
FIGURE 24-2: CRC SHIFT ENGINE DETAIL
Note: This data sheet summarizes the features of
this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information, refer to the
“PIC24F Family Reference Manual”,
“32-Bit Programmable Cyclic Redun-
dancy Check (CRC)” (DS39729). The
information in this data sheet supersedes
the information in the FRM.
CRC
Interrupt
Variable FIFO
(4x32, 8x16 or 16x8)
CRCDATH
CRCDATL
Shift Buffer
CRC Shift Engine
CRCWDATH
CRCWDATL
Shifter Clock
2 * FCY
LENDIAN
CRCISEL
1
0
FIFO Empty
Event
Shift
Complete
Event
1
0
Note 1: n = PLEN<4:1> + 1.
CRC Shift Engine
CRCWDATH CRCWDATL
Bit 0 Bit 1
Bit n
(1)
X0
X1
Xn
(1)
Read/Write Bus
Shift Buffer
Data