Datasheet

PIC24FJ128GC010 FAMILY
DS30009312B-page 304 2012-2013 Microchip Technology Inc.
TABLE 21-2: ENHANCED PARALLEL MASTER PORT PIN DESCRIPTIONS
Pin Name
(Alternate Function)
Type Description
PMA<22:16> O Address Bus bits<22:16>
PMA<15>
(PMCS2)
O Address Bus bit 15
I/O Data Bus bit 15 (16-bit port with multiplexed addressing)
O Chip Select 2 (alternate location)
PMA<14>
(PMCS1)
O Address Bus bit 14
I/O Data Bus bit 14 (16-bit port with multiplexed addressing)
O Chip Select 1 (alternate location)
PMA<13:8>
O Address Bus bits<13:8>
I/O Data Bus bits<13:8> (16-bit port with multiplexed addressing)
PMA<7:3> O Address Bus bits<7:3>
PMA<2>
(PMALU)
O Address Bus bit 2
O Address Latch Upper Strobe for Multiplexed Addressing
PMA<1>
(PMALH)
I/O Address Bus bit 1
O Address Latch High Strobe for Multiplexed Addressing
PMA<0>
(PMALL)
I/O Address Bus bit 0
O Address Latch Low Strobe for Multiplexed Addressing
PMD<15:8> I/O Data Bus bits<15:8> (demultiplexed addressing)
PMD<7:4>
I/O Data Bus bits<7:4>
O Address Bus bits<7:4> (4-bit port with 1-phase multiplexed addressing)
PMD<3:0> I/O Data Bus bits<3:0>
PMCS1
(1)
I/O Chip Select 1
PMCS2
(1)
O Chip Select 2
PMWR I/O Write Strobe
(2)
(PMENB) I/O Enable Signal
(2)
PMRD I/O Read Strobe
(2)
(PMRD/PMWR) I/O Read/Write Signal
(2)
PMBE1 O Byte Indicator
PMBE0 O Nibble or Byte Indicator
PMACK1 I Acknowledgment Signal 1
PMACK2 I Acknowledgment Signal 2
Note 1: These pins are implemented in 100/121-pin devices only.
2: Signal function depends on the setting of the MODE<1:0> and SM bits (PMCON1<9:8> and PMCSxCF<8>).