Datasheet
2012-2013 Microchip Technology Inc. DS30009312B-page 237
PIC24FJ128GC010 FAMILY
16.0 SERIAL PERIPHERAL
INTERFACE (SPI)
The Serial Peripheral Interface (SPI) module is a
synchronous serial interface useful for communicating
with other peripheral or microcontroller devices. These
peripheral devices may be serial EEPROMs, shift
registers, display drivers, A/D Converters, etc. The SPI
module is compatible with the SPI and SIOP Motorola
®
interfaces. All devices of the PIC24FJ128GC010 family
include two SPI modules.
The module supports operation in two buffer modes. In
Standard Buffer mode, data is shifted through a single
serial buffer. In Enhanced Buffer mode, data is shifted
through an 8-level FIFO buffer.
The module also supports a basic framed SPI protocol
while operating in either Master or Slave mode. A total
of four framed SPI configurations are supported.
The SPI serial interface consists of four pins:
• SDIx: Serial Data Input
• SDOx: Serial Data Output
• SCKx: Shift Clock Input or Output
• SSx
: Active-Low Slave Select or Frame
Synchronization I/O Pulse
The SPI module can be configured to operate using 2,
3 or 4 pins. In the 3-pin mode, SSx
is not used; in the
2-pin mode, both SDOx and SSx
are not used.
Block diagrams of the module in Standard and
Enhanced modes are shown in Figure 16-1 and
Figure 16-2.
Note: This data sheet summarizes the features of
this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information, refer to the
“PIC24F Family Reference Manual”,
“Serial Peripheral Interface (SPI)”
(DS39699). The information in this data
sheet supersedes the information in the
FRM.
Note: Do not perform Read/Modify/Write opera-
tions (such as bit-oriented instructions) on
the SPIxBUF register in either Standard or
Enhanced Buffer mode.
Note: In this section, the SPI modules are
referred to together as SPIx, or separately
as SPI1 or SPI2. Special Function Regis-
ters will follow a similar notation. For
example, SPIxCON1 and SPIxCON2
refer to the control registers for any of the
two SPI modules.