Datasheet

 2012-2013 Microchip Technology Inc. DS30009312B-page 17
PIC24FJ128GC010 FAMILY
TABLE 1-2: DEVICE FEATURES FOR THE PIC24FJ128GC010 FAMILY: 100/121-PIN DEVICES
Features PIC24FJ64GC010 PIC24FJ128GC010
Operating Frequency DC – 32 MHz
Program Memory (bytes) 64K 128K
Program Memory (instructions) 22,016 44,032
Data Memory (bytes) 8K
Interrupt Sources (soft vectors/
NMI traps)
66 (62/4)
I/O Ports Ports A, B, C, D, E, F, G
To tal I/O Pins 85
Remappable Pins 44 (32 I/O, 12 input only)
Timers:
Total Number (16-bit) 5
(1)
32-Bit (from paired 16-bit timers) 2
Input Capture w/Timer Channels 9
(1)
Output Compare/PWM Channels 9
(1)
Input Change Notification Interrupt 82
Serial Communications:
UART 4
(1)
SPI (3-wire/4-wire) 2
(1)
I
2
C™ 2
Digital Signal Modulator Yes
Parallel Communications (EPMP/PSP) Yes
JTAG Boundary Scan Yes
12-Bit Pipeline Analog-to-Digital
Converter (A/D) (input channels)
50
Sigma-Delta Analog-to-Digital
Converter (A/D) (differential channels)
2
Digital-to-Analog Converter (DAC) 2
Operational Amplifiers 2
Analog Comparators 3
CTMU Interface Yes
LCD Controller (available pixels) 472 (59 SEG x 8 COM)
Resets (and delays) Core POR, V
DD POR, VBAT POR, BOR, RESET Instruction,
MCLR
, WDT, Illegal Opcode, REPEAT Instruction,
Hardware Traps, Configuration Word Mismatch
(OST, PLL Lock)
Instruction Set 76 Base Instructions, Multiple Addressing Mode Variations
Packages 100-Pin TQFP and 121-Pin BGA
Note 1: Peripherals are accessible through remappable pins.