Datasheet

 2012-2013 Microchip Technology Inc. DS30009312B-page 155
PIC24FJ128GC010 FAMILY
REGISTER 8-44: IPC26: INTERRUPT PRIORITY CONTROL REGISTER 26
U-0 U-0 U-0 U-0 U-0 R/W-1 R/W-0 R/W-0
— — — — — FSTIP2 FSTIP1 FSTIP0
bit 15 bit 8
U-0 R/W-1 R/W-0 R/W-0 U-0 R/W-1 R/W-0 R/W-0
— SDA1IP2 SDA1IP1 SDA1IP0 — AMP2IP2 AMP2IP1 AMP2IP0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-11 Unimplemented: Read as ‘0’
bit 10-8 FSTIP<2:0>: FRC Self-Tune Interrupt Priority bits
111 = Interrupt is Priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is Priority 1
000 = Interrupt source is disabled
bit 7 Unimplemented: Read as ‘0’
bit 6-4 SDA1IP<2:0>: Sigma-Delta A/D Converter Interrupt Priority bits
111 = Interrupt is Priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is Priority 1
000 = Interrupt source is disabled
bit 3 Unimplemented: Read as ‘0’
bit 2-0 AMP2IP<2:0>: Op Amp 2 Interrupt Priority bits
111 = Interrupt is Priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is Priority 1
000 = Interrupt source is disabled