Datasheet

2013 Microchip Technology Inc. DS30003030B-page 47
PIC24FV16KM204 FAMILY
TABLE 4-5: INTERRUPT CONTROLLER REGISTER MAP
File Name Addr. Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
INTCON1 80h NSTDIS
MATHERR ADDRERR STKERR OSCFAIL 0000
INTCON2 82h ALTIVT DISI
INT2EP INT1EP INT0EP 0000
IFS0 84h NVMIF
AD1IF U1TXIF U1RXIF CCT2IF CCT1IF CCP4IF CCP3IF T1IF CCP2IF CCP1IF INT0IF 0000
IFS1 86h U2TXIF U2RXIF INT2IF CCT4IF CCT3IF
CCP5IF INT1IF CNIF CMIF BCL1IF SSP1IF 0000
IFS2 88h
CCT5IF 0000
IFS3 8Ah
—RTCIF BCL2IF SSP2IF 0000
IFS4 8Ch DAC2IF DAC1IF CTMUIF
—HLVDIF U2ERIF U1ERIF 0000
IFS5 8Eh
—ULPWUIF0000
IFS6 90h
CLC2IF CLC1IF 0000
IEC0 94h NVMIE
AD1IE U1TXIE U1RXIE CCT2IE CCT1IE CCP4IE CCP3IE T1IE CCP2IE CCP1IE INT0IE 0000
IEC1 96h U2TXIE U2RXIE INT2IE CCT4IE CCT3IE
CCP5IE INT1IE CNIE CMIE BCL1IE SSP1IE 0000
IEC2 98h
CCT5IE 0000
IEC3 9Ah
—RTCIE BCL2IE SSP2IE 0000
IEC4 9Ch DAC2IE DAC1IE CTMUIE
—HLVDIE U2ERIE U1ERIE 0000
IEC5 9Eh
—ULPWUIE0000
IEC6 A0h
CLC2IE CLC1IE 0000
IPC0 A4h
T1IP2 T1IP1 T1IP0 CCP2IP2 CCP2IP1 CCP2IP0 CCP1IP2 CCP1IP1 CCP1IP0 INT0IP2 INT0IP1 INT0IP0 4444
IPC1 A6h
CCT1IP2 CCT1IP1 CCT1IP0 CCP4IP2 CCP4IP1 CCP4IP0 CCP3IP2 CCP3IP1 CCP3IP0 4440
IPC2 A8h
U1RXIP2 U1RXIP1 U1RXIP0 CCT2IP2 CCT2IP1 CCT2IP0 4004
IPC3 AAh
NVMIP2 NVMIP1 NVMIP0 AD1IP2 AD1IP1 AD1IP0 U1TXIP2 U1TXIP1 U1TXIP0 4044
IPC4 ACh
CNIP2 CNIP1 CNIP0 CMIP2 CMIP1 CMIP0 BCL1IP2 BCL1IP1 BCL1IP0 SSP1IP2 SSP1IP1 SSP1IP0 4444
IPC5 AEh
CCP5IP2 CCP5IP1 CCP5IP0 INT1IP2 INT1IP1 INT1IP0 0404
IPC6 B0h
CCT3IP2 CCT3IP1 CCT3IP0 4000
IPC7 B2h
U2TXIP2 U2TXIP1 U2TXIP0 U2RXIP2 U2RXIP1 U2RXIP0 INT2IP2 INT2IP1 INT2IP0 CCT4IP2 CCT4IP1 CCT4IP0 4444
IPC10 B8h
CCT5IP2 CCT5IP1 CCT5IP0 0040
IPC12 BCh
BCL2IP2 BCL2IP1 BCL2IP0 SSP2IP2 SSP2IP1 SSP2IP0 0440
IPC15 C2h
RTCIP2 RTCIP1 RTCIP0 0400
IPC16 C4h
U2ERIP2 U2ERIP1 U2ERIP0 U1ERIP2 U1ERIP1 U1ERIP0 0440
IPC18 C8h
HLVDIP2 HLVDIP1 HLVDIP0 0004
IPC19 CAh
DAC2IP2 DAC2IP1 DAC2IP0 DAC1IP2 DAC1IP1 DAC1IP0 CTMUIP2 CTMUIP1 CTMUIP0 4440
IPC20 CCh
ULPWUIP2 ULPWUIP1 ULPWUIP0 0004
IPC24 D4h
CLC2IP2 CLC2IP1 CLC2IP0 CLC1IP2 CLC1IP1 CLC1IP0 0044
INTTREG E0h CPUIRQ
—VHOLD ILR3 ILR2 ILR1 ILR0 VECNUM6 VECNUM5 VECNUM4 VECNUM3 VECNUM2 VECNUM1 VECNUM0 0000
Legend: x = unknown, u = unchanged, — = unimplemented, q = value depends on condition, r = reserved.