Datasheet
2013 Microchip Technology Inc. DS30003030B-page 329
PIC24FV16KM204 FAMILY
M
Master Synchronous Serial Port (MSSP) ......................... 159
Microchip Internet Web Site ............................................. 332
MPLAB Assembler, Linker, Librarian ............................... 262
MPLAB ICD 3 In-Circuit Debugger .................................. 263
MPLAB PM3 Device Programmer ................................... 263
MPLAB REAL ICE In-Circuit Emulator System ................ 263
MPLAB X Integrated Development
Environment Software .............................................. 261
MPLAB X SIM Software Simulator ................................... 263
MPLIB Object Librarian .................................................... 262
MPLINK Object Linker ..................................................... 262
N
Near Data Space ............................................................... 44
O
On-Chip Voltage Regulator .............................................. 257
Oscillator Configuration
Clock Switching ........................................................ 127
Sequence ......................................................... 127
Configuration Bit Values for Clock Selection ........... 122
Control Registers ..................................................... 123
CPU Clocking Scheme ............................................ 122
Initial Configuration on POR .................................... 122
Reference Clock Output ........................................... 128
P
Packaging
Details ...................................................................... 300
Marking .................................................................... 297
PICkit 3 In-Circuit Debugger/Programmer ....................... 263
Power-Saving ................................................................... 135
Power-Saving Features ................................................... 131
Clock Frequency, Clock Switching ........................... 131
Coincident Interrupts ................................................ 132
Instruction-Based Modes ......................................... 131
Idle ................................................................... 132
Sleep ................................................................ 131
Retention Regulator (RETREG) ............................... 134
Selective Peripheral Control .................................... 135
Ultra Low-Power Wake-up (ULPWU) ....................... 132
Voltage Regulator-Based ......................................... 134
Retention Sleep Mode ..................................... 134
Run Mode ........................................................ 134
Sleep Mode ...................................................... 134
Product Identification System .......................................... 334
Program and Data Memory
Access Using Table Instructions ................................ 65
Program Space Visibility ............................................ 66
Program and Data Memory Spaces
Interfacing, Addressing .............................................. 63
Program Memory
Address Space ........................................................... 41
Configuration Word Addresses .................................. 42
Program Space
Memory Map .............................................................. 41
Program Verification ........................................................ 259
R
Real-Time Clock and Calendar (RTCC) ........................... 181
Register Maps
A/D ............................................................................. 59
ANSEL ....................................................................... 60
Band Gap Buffer Control ............................................ 61
CLC1-2 ....................................................................... 48
Clock Control ............................................................. 62
Comparator ................................................................ 61
CPU Core .................................................................. 45
CTMU ........................................................................ 60
DAC1 ......................................................................... 56
DAC2 ......................................................................... 56
ICN ............................................................................ 46
Interrupt Controller ..................................................... 47
MCCP1 ...................................................................... 49
MCCP2 ...................................................................... 50
MCCP3 ...................................................................... 51
MSSP1 (I
2
C/SPI) ....................................................... 54
MSSP2 (I
2
C/SPI) ....................................................... 54
NVM ........................................................................... 62
Op Amp 1 .................................................................. 56
Op Amp 2 .................................................................. 56
Pad Configuration ...................................................... 58
PMD ........................................................................... 62
PORTA ...................................................................... 57
PORTB ...................................................................... 57
PORTC ...................................................................... 57
Real-Time Clock and Calendar ................................. 60
SCCP4 ....................................................................... 52
SCCP5 ....................................................................... 53
Timer1 ....................................................................... 48
UART1 ....................................................................... 55
UART2 ....................................................................... 55
Ultra Low-Power Wake-up ......................................... 62
Registers
AD1CHITH (A/D Scan Compare Hit,
High Word) ...................................................... 219
AD1CHITL (A/D Scan Compare Hit,
Low Word) ....................................................... 220
AD1CHS (A/D Sample Select) ................................ 218
AD1CON1 (A/D Control 1) ....................................... 213
AD1CON2 (A/D Control 2) ....................................... 215
AD1CON3 (A/D Control 3) ....................................... 216
AD1CON5 (A/D Control 5) ....................................... 217
AD1CSSH (A/D Input Scan Select, High Word) ...... 221
AD1CSSL (A/D Input Scan Select, Low Word) ....... 221
AD1CTMENH (CTMU Enable, High Word) ............. 222
AD1CTMENL (CTMU Enable, Low Word) ............... 222
ALCFGRPT (Alarm Configuration) .......................... 186
ALMINSEC (Alarm Minutes and
Seconds Value) ............................................... 190
ALMTHDY (Alarm Month and Day Value) ............... 189
ALWDHR (Alarm Weekday and Hours Value) ........ 189
AMPxCON (Op Amp x Control) ............................... 234
ANSA (PORTA Analog Selection) ........................... 138
ANSB (PORTB Analog Selection) ........................... 139
ANSC (PORTC Analog Selection) ........................... 139
BUFCON0 (Internal Voltage Reference
Control 0) ......................................................... 232
CCPxCON1H (CCPx Control 1 High) ...................... 152
CCPxCON1L (CCPx Control 1 Low) ....................... 150
CCPxCON2H (CCPx Control 2 High) ...................... 155
CCPxCON2L (CCPx Control 2 Low) ....................... 154
CCPxCON3H (CCPx Control 3 High) ...................... 157
CCPxCON3L (CCPx Control 3 Low) ....................... 156
CCPxSTATL (CCPx Status) .................................... 158
CLCxCONH (CLCx Control High) ............................ 199
CLCxCONL (CLCx Control Low) ............................. 198
CLCxGLSH (CLCx Gate Logic Input Select High) ... 204
CLCxGLSL (CLCx Gate Logic Input Select Low) .... 202
CLCxSEL (CLCx Input MUX Select) ....................... 200
CLKDIV (Clock Divider) ........................................... 125