Datasheet
PIC24FV16KM204 FAMILY
DS30003030B-page 328 2013 Microchip Technology Inc.
Comparator Voltage Reference ....................................... 239
Configuring ...............................................................239
Configurable Logic Cell (CLC) ......................................... 195
Configuration Bits .............................................................249
CPU
ALU ............................................................................39
Control Registers .......................................................38
Core Registers ........................................................... 36
Programmer’s Model .................................................. 35
CTMU
Measuring Capacitance ........................................... 241
Measuring Time ....................................................... 242
Pulse Generation and Delay .................................... 243
Customer Change Notification Service ............................332
Customer Notification Service .......................................... 332
Customer Support ............................................................ 332
D
Data EEPROM Memory ..................................................... 73
Erasing .......................................................................76
Operations ................................................................. 75
Programming
Bulk Erase .......................................................... 77
Reading Data EEPROM .................................... 78
Single-Word Write .............................................. 77
Programming Control Registers
NVMADR(U) ...................................................... 75
NVMCON ........................................................... 73
NVMKEY ............................................................73
Data Memory
Address Space ........................................................... 43
Width .................................................................. 43
Near Data Space ....................................................... 44
Organization, Alignment ............................................. 44
SFR Space .................................................................44
Software Stack ........................................................... 63
Data Space
Memory Map .............................................................. 43
DC Characteristics
BOR Trip Points .......................................................269
Comparator .............................................................. 276
CTMU Current Source ............................................. 277
Data EEPROM Memory ...........................................276
High/Low-Voltage Detect ......................................... 269
I/O Pin Input Specifications ...................................... 274
I/O Pin Output Specifications ................................... 275
Idle Current (I
IDLE) ...................................................271
Internal Voltage Regulator ....................................... 277
Operating Current (I
DD) ............................................ 270
Operational Amplifier ............................................... 278
Power-Down Current (I
PD) ....................................... 272
Program Memory ..................................................... 275
Temperature and Voltage Specifications ................. 268
Demo/Development Boards, Evaluation and
Starter Kits ............................................................... 264
Development Support ...................................................... 261
Third-Party Tools .....................................................264
Device Features
PIC24F16KM104 Family ............................................ 16
PIC24F16KM204 Family ............................................ 15
PIC24FV16KM104 Family ......................................... 18
PIC24FV16KM204 Family ......................................... 17
Device Overview ................................................................ 13
Core Features ............................................................ 13
Other Special Features .............................................. 14
Pinout Description ...................................................... 20
Dual Operational Amplifier ............................................... 233
E
Electrical Characteristics
Absolute Maximum Ratings ..................................... 265
Thermal Operating Conditions ................................. 268
Thermal Packaging .................................................. 268
Equations
A/D Conversion Clock Period .................................. 223
UARTx Baud Rate with BRGH = 0 .......................... 174
UARTx Baud Rate with BRGH = 1 .......................... 174
Errata ................................................................................. 11
Examples
Baud Rate Error Calculation (BRGH = 0) ................ 174
F
Flash Program Memory
Control Registers ....................................................... 68
Enhanced ICSP Operation ........................................ 68
Programming Algorithm ............................................. 70
Programming Operations ........................................... 68
RTSP Operation ........................................................ 68
Table Instructions ...................................................... 67
G
Getting Started Guidelines ................................................. 29
External Oscillator Pins .............................................. 33
ICSP Pins .................................................................. 32
Master Clear (MCLR
) Pin .......................................... 30
Power Supply Pins ..................................................... 30
Unused I/Os ............................................................... 33
Voltage Regulator Pin (V
CAP) .................................... 31
H
High/Low-Voltage Detect (HLVD) .................................... 207
I
I/O Ports
Analog Port Pins Configuration ................................ 138
Analog Selection Registers ...................................... 138
Input Change Notification ........................................ 140
Open-Drain Configuration ........................................ 138
Parallel (PIO) ........................................................... 137
In-Circuit Debugger .......................................................... 259
In-Circuit Serial Programming (ICSP) .............................. 259
Inter-Integrated Circuit. See I
2
C.
Internet Address .............................................................. 332
Interrupts
Alternate Interrupt Vector Table (AIVT) ..................... 85
Control and Status Registers ..................................... 88
Implemented Vectors ................................................. 87
Interrupt Vector Table (IVT) ....................................... 85
Reset Sequence ........................................................ 85
Setup Procedures .................................................... 119
Trap Vectors .............................................................. 87
Vector Table .............................................................. 86