Datasheet

PIC24FV16KM204 FAMILY
DS30003030B-page 292  2013 Microchip Technology Inc.
FIGURE 27-17: MSSPx I
2
C™ BUS START/STOP BITS TIMING WAVEFORMS
TABLE 27-35: I
2
C™ BUS START/STOP BITS REQUIREMENTS (MASTER MODE)
Param.
No.
Symbol Characteristic Min Max Units Conditions
90 T
SU:STA Start Condition
Setup Time
100 kHz mode 2(TOSC)(BRG + 1) — ns Only relevant for
Repeated Start
condition
400 kHz mode 2(T
OSC)(BRG + 1) —
91 THD:STA Start Condition
Hold Time
100 kHz mode 2(TOSC)(BRG + 1) — ns After this period, the
first clock pulse is
generated
400 kHz mode 2(T
OSC)(BRG + 1) —
92 TSU:STO Stop Condition
Setup Time
100 kHz mode 2(TOSC)(BRG + 1) —
—
ns
400 kHz mode 2(TOSC)(BRG + 1)
93 THD:STO Stop Condition
Hold Time
100 kHz mode 2(TOSC)(BRG + 1) — ns
400 kHz mode 2(T
OSC)(BRG + 1) —
Note: Refer to Figure 27-5 for load conditions.
SCLx
SDAx
Start
Condition
Stop
Condition
91
90
93
92