Datasheet

 2013 Microchip Technology Inc. DS30003030B-page 285
PIC24FV16KM204 FAMILY
TABLE 27-26: COMPARATOR TIMING REQUIREMENTS
TABLE 27-27: COMPARATOR VOLTAGE REFERENCE SETTLING TIME SPECIFICATIONS
FIGURE 27-10: CAPTURE/COMPARE/PWM TIMINGS (MCCPx, SCCPx MODULES)
TABLE 27-28: CAPTURE/COMPARE/PWM REQUIREMENTS (MCCPx, SCCPx MODULES)
Param
No.
Symbol Characteristic Min Typ Max Units Comments
300 T
RESP Response Time
*(1)
— 150 400 ns
301 T
MC2OV Comparator Mode Change to
Output Valid
*
——10s
* Parameters are characterized but not tested.
Note 1: Response time is measured with one comparator input at (V
DD – 1.5)/2, while the other input transitions
from V
SS to VDD.
Param
No.
Symbol Characteristic Min Typ Max Units Comments
VR310 T
SET Settling Time
(1)
——10s
Note 1: Settling time is measured while CVRSS = 1 and the CVR<3:0> bits transition from ‘0000’ to ‘1111’.
Param
No.
Symbol Characteristic Min Max Units Conditions
50 T
CLKL CCPx Time Base Clock Source Low Time TCY/2 — ns
51 T
CLKH CCPx Time Base Clock Source High Time TCY/2 — ns
52 T
CLK CCPx Time Base Clock Source Period TCY —ns
53 T
CCL CCPx Capture or Gating Input Low Time TCLK —ns
54 T
CCH CCPx Capture or Gating Input High Time TCLK —ns
55 T
CCP CCPx Capture or Gating Input Period 2 * TCLK/N — ns N = Prescale
Value (1, 4 or 16)
Note: Refer to Figure 27-5 for load conditions.
CCPx Time Base
50 51
52
Clock Source
CCPx Capture Input (ICx)
53 54
55
and Gating Inputs