Datasheet
2013 Microchip Technology Inc. DS30003030B-page 27
PIC24FV16KM204 FAMILY
SCL1 12 17 14 44 48 12 17 14 44 48 I/O I2C MSSP1 I
2
C Clock
SDA1 13 18 15 1 1 13 18 15 1 1 I/O I2C MSSP1 I
2
C Data
SCL2 — 7 4 24 26 — 7 4 24 26 I/O I2C MSSP2 I
2
C Clock
SDA2 — 6 3 23 25 — 6 3 23 25 I/O I2C MSSP2 I
2
C Data
SCLKI 10 12 9 34 37 10 12 9 34 37 I ST Secondary Clock Digital Input
SOSCI 9 11 8 33 36 9 11 8 33 36 I ANA Secondary Oscillator Input
SOSCO 10 12 9 34 37 10 12 9 34 37 I ANA Secondary Oscillator Output
T1CK 13 18 15 1 1 13 18 15 1 1 I ST Timer1 Digital Input Cock
TCKIA 18 26 23 15 16 18 26 23 15 16 I ST MCCP/SCCP Time Base Clock Input A
TCKIB 6 6 3 23 25 6 6 3 23 25 I ST MCCP/SCCP Time Base Clock Input B
U1CTS
12 17 14 44 48 12 17 14 44 48 I ST UART1 Clear-To-Send Input
U1RTS
13 18 15 1 1 13 18 15 1 1 O — UART1 Request-To-Send Output
U1BCLK 13 18 15 1 1 13 18 15 1 1 O — UART1 16x Baud Rate Clock Output
U1RX 6 6 3 2 2 6 6 3 2 2 I ST UART1 Receive
U1TX 11 16 13 3 3 11 16 13 3 3 O — UART1 Transmit
U2CTS
— 12 9 34 37 — 12 9 34 37 I ST UART2 Clear-To-Send Input
U2RTS
— 11 8 33 36 — 11 8 33 36 O — UART2 Request-To-Send Output
U2BCLK 13 18 15 1 1 13 18 15 1 1 O — UART2 16x Baud Rate Clock Output
U2RX — 5 2 22 24 — 5 2 22 24 I ST UART2 Receive
U2TX — 4 1 21 23 — 4 1 21 23 O — UART2 Transmit
ULPWU 4 4 1 21 23 4 4 1 21 23 I ANA Ultra Low-Power Wake-up Input
VCAP — — — — — 14 20 17 7 7 P — Regulator External Filter Capacitor Connection
V
DD 20 28 25 17,28,28 18,30,30 20 28 25 17,28,28 18,30,30 P — Device Positive Supply Voltage
V
DDCORE — — — — — 14 20 17 7 7 P — Microcontroller Core Supply Voltage
V
PP 1 1 26 18 19 1 1 26 18 19 P — High-Voltage Programming Pin
V
REF+ 2 2 27 19 21 2 2 27 19 21 I ANA A/D Reference Voltage Positive Input
V
REF- 3 3 28 20 22 3 3 28 20 22 I ANA A/D Reference Voltage Negative Input
V
SS 19 27 24 16,29,29 17,31,31 19 27 24 16,29,29 17,31,31 P — Device Ground Return Voltage
TABLE 1-5: PIC24FV16KM204 FAMILY PINOUT DESCRIPTION (CONTINUED)
Function
FFV
I/O Buffer Description
Pin Number Pin Number
20-Pin
PDIP/
SSOP/
SOIC
28-Pin
PDIP/
SSOP/
SOIC
28-Pin
QFN
44-Pin
QFN/
TQFP
48-Pin
UQFN
20-Pin
PDIP/
SSOP/
SOIC
28-Pin
PDIP/
SSOP/
SOIC
28-Pin
QFN
44-Pin
QFN/
TQFP
48-Pin
UQFN
Legend: ANA = Analog level input/output, ST = Schmitt Trigger input buffer, I
2
C™ = I
2
C/SMBus input buffer