Datasheet

 2013 Microchip Technology Inc. DS30003030B-page 249
PIC24FV16KM204 FAMILY
25.0 SPECIAL FEATURES
PIC24FXXXXX family devices include several features
intended to maximize application flexibility and reli-
ability, and minimize cost through elimination of
external components. These are:
• Flexible Configuration
• Watchdog Timer (WDT)
• Code Protection
• In-Circuit Serial Programming™ (ICSP™)
• In-Circuit Emulation
25.1 Configuration Bits
The Configuration bits can be programmed (read as
‘0’) or left unprogrammed (read as ‘1’) to select various
device configurations. These bits are mapped, starting
at program memory location, F80000h. A complete list
of Configuration register locations is provided in
Table 25-1. A detailed explanation of the various bit
functions is provided in Register 25-1 through
Register 25-9.
The address, F80000h, is beyond the user program
memory space. In fact, it belongs to the configuration
memory space (800000h-FFFFFFh), which can only be
accessed using Table Reads and Table Writes.
TABLE 25-1: CONFIGURATION REGISTERS
LOCATIONS
REGISTER 25-1: FBS: BOOT SEGMENT CONFIGURATION REGISTER
Note: This data sheet summarizes the features of
this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information on the
Watchdog Timer, High-Level Device
Integration and Programming Diagnostics,
refer to the individual sections of the
“PIC24F Family Reference Manual”
provided below:
• “Watchdog Timer (WDT)” (DS39697)
• “Programming and Diagnostics”
(DS39716)
Configuration
Register
Address
FBS F80000
FGS F80004
FOSCSEL F80006
FOSC F80008
FWDT F8000A
FPOR F8000C
FICD F8000E
U-0 U-0 U-0 U-0 R/W-1 R/W-1 R/W-1 R/W-1
— — — — BSS2 BSS1 BSS0 BWRP
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-4 Unimplemented: Read as ‘0’
bit 3-1 BSS<2:0>: Boot Segment Program Flash Code Protection bits
111 = No boot program Flash segment
011 = Reserved
110 = Standard security, boot program Flash segment starts at 200h, ends at 000AFEh
010 = High-security, boot program Flash segment starts at 200h, ends at 000AFEh
101 = Standard security, boot program Flash segment starts at 200h, ends at 0015FEh
(1)
001 = High-security, boot program Flash segment starts at 200h, ends at 0015FEh
(1)
100 = Reserved
000 = Reserved
bit 0 BWRP: Boot Segment Program Flash Write Protection bit
1 = Boot Segment may be written
0 = Boot Segment is write-protected
Note 1: This selection should not be used in PIC24FV08KMXXX devices.