Datasheet

PIC24FV16KM204 FAMILY
DS30003030B-page 150  2013 Microchip Technology Inc.
REGISTER 13-1: CCPxCON1L: CCPx CONTROL 1 LOW REGISTERS
R/W-0 U-0 R/W-0 r-0 R/W-0 R/W-0 R/W-0 R/W-0
CCPON — CCPSIDL r TMRSYNC CLKSEL2
(1)
CLKSEL1
(1)
CLKSEL0
(1)
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
TMRPS1 TMRPS0 T32 CCSEL MOD3 MOD2 MOD1 MOD0
bit 7 bit 0
Legend: r = Reserved bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 CCPON: CCPx Module Enable bit
1 = Module is enabled with an operating mode specified by the MOD<3:0> control bits
0 = Module is disabled
bit 14 Unimplemented: Read as ‘0’
bit 13 CCPSIDL: CCPx Stop in Idle Mode Bit
1 = Discontinues module operation when device enters Idle mode
0 = Continues module operation in Idle mode
bit 12 Reserved: Maintain as ‘0’
bit 11 TMRSYNC: Time Base Clock Synchronization bit
1 = Asynchronous module time base clock is selected and synchronized to the internal system clocks
(CLKSEL<2:0>  000)
0 = Synchronous module time base clock is selected and does not require synchronization
(CLKSEL<2:0> = 000)
bit 10-8 CLKSEL<2:0>: CCPx Time Base Clock Select bits
(1)
111 = External TCLKIA input
110 = External TCLKIB input
101 = CLC1
100 = Reserved
011 = LPRC (31 kHz source)
010 = Secondary Oscillator
001 = Reserved
000 = System clock (T
CY)
bit 7-6 TMRPS<1:0>: Time Base Prescale Select bits
11 = 1:64 Prescaler
10 = 1:16 Prescaler
01 = 1:4 Prescaler
00 = 1:1 Prescaler
bit 5 T32: 32-Bit Time Base Select bit
1 = Uses 32-bit time base for timer, single edge output compare or input capture function
0 = Uses 16-bit time base for timer, single edge output compare or input capture function
bit 4 CCSEL: Capture/Compare Mode Select bit
1 = Input Capture peripheral
0 = Output Compare/PWM/Timer peripheral (exact function is selected by the MOD<3:0> bits)
Note 1: Clock options are limited in some operating modes. See Table 13-1 for restrictions.