Datasheet

PIC24FV16KM204 FAMILY
DS30003030B-page 108  2013 Microchip Technology Inc.
REGISTER 8-24: IPC5: INTERRUPT PRIORITY CONTROL REGISTER 5
U-0 U-0 U-0 U-0 U-0 R/W-1 R/W-0 R/W-0
— — — — — CCP5IP2 CCP5IP1 CCP5IP0
bit 15 bit 8
U-0 U-0 U-0 U-0 U-0 R/W-1 R/W-0 R/W-0
— — — — — INT1IP2 INT1IP1 INT1IP0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-11 Unimplemented: Read as ‘0’
bit 10-8 CCP5IP<2:0>: Capture/Compare 5 Event Interrupt Priority bits
111 = Interrupt is Priority 7 (highest priority interrupt)
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001 = Interrupt is Priority 1
000 = Interrupt source is disabled
bit 7-3 Unimplemented: Read as ‘0’
bit 2-0 INT1IP<2:0>: External Interrupt 1 Priority bits
111 = Interrupt is Priority 7 (highest priority interrupt)
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001 = Interrupt is Priority 1
000 = Interrupt source is disabled