Datasheet
2013 Microchip Technology Inc. DS30003030B-page 105
PIC24FV16KM204 FAMILY
REGISTER 8-21: IPC2: INTERRUPT PRIORITY CONTROL REGISTER 2
U-0 R/W-1 R/W-0 R/W-0 U-0 U-0 U-0 U-0
— U1RXIP2 U1RXIP1 U1RXIP0 — — — —
bit 15 bit 8
U-0 U-0 U-0 U-0 U-0 R/W-1 R/W-0 R/W-0
— — — — — CCT2IP2 CCT2IP1 CCT2IP0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 Unimplemented: Read as ‘0’
bit 14-12 U1RXIP<2:0>: UART1 Receiver Interrupt Priority bits
111 = Interrupt is Priority 7 (highest priority interrupt)
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001 = Interrupt is Priority 1
000 = Interrupt source is disabled
bit 11-3 Unimplemented: Read as ‘0’
bit 2-0 CCT2IP<2:0>: Capture/Compare 2 Timer Interrupt Priority bits
111 = Interrupt is Priority 7 (highest priority interrupt)
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•
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001 = Interrupt is Priority 1
000 = Interrupt source is disabled