Datasheet

PIC24FV16KM204 FAMILY
DS30003030B-page 104  2013 Microchip Technology Inc.
REGISTER 8-20: IPC1: INTERRUPT PRIORITY CONTROL REGISTER 1
U-0 R/W-1 R/W-0 R/W-0 U-0 R/W-1 R/W-0 R/W-0
— CCT1IP2 CCT1IP1 CCT1IP0 — CCP4IP2 CCP4IP1 CCP4IP0
bit 15 bit 8
U-0 R/W-1 R/W-0 R/W-0 U-0 U-0 U-0 U-0
— CCP3IP2 CCP3IP1 CCP3IP0 — — — —
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 Unimplemented: Read as ‘0’
bit 14-12 CCT1IP<2:0>: Capture/Compare 1 Timer Interrupt Priority bits
111 = Interrupt is Priority 7 (highest priority interrupt)
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001 = Interrupt is Priority 1
000 = Interrupt source is disabled
bit 11 Unimplemented: Read as ‘0’
bit 10-8 CCP4IP<2:0>: Capture/Compare 4 Event Interrupt Priority bits
111 = Interrupt is Priority 7 (highest priority interrupt)
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001 = Interrupt is Priority 1
000 = Interrupt source is disabled
bit 7 Unimplemented: Read as ‘0’
bit 6-4 CCP3IP<2:0>: Capture/Compare 3 Event Interrupt Priority bits
111 = Interrupt is Priority 7 (highest priority interrupt)
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001 = Interrupt is Priority 1
000 = Interrupt source is disabled
bit 3-0 Unimplemented: Read as ‘0’