Datasheet

PIC24F16KL402 FAMILY
DS31037B-page 214  2011 Microchip Technology Inc.
FIGURE 26-6: EXAMPLE SPI MASTER MODE TIMING (CKE = 0)
TABLE 26-27: EXAMPLE SPI MODE REQUIREMENTS (MASTER MODE, CKE = 0)
Param
No.
Symbol Characteristic Min Max Units Conditions
73 T
DIV2SCH,
T
DIV2SCL
Setup Time of SDIx Data Input to SCKx Edge 20 — ns
74 T
SCH2DIL,
T
SCL2DIL
Hold Time of SDIx Data Input to SCKx Edge 40 — ns
75 TDOR SDOx Data Output Rise Time — 25 ns
76 TDOF SDOx Data Output Fall Time — 25 ns
78 T
SCR SCKx Output Rise Time (Master mode) — 25 ns
79 T
SCF SCKx Output Fall Time (Master mode) — 25 ns
FSCK SCKx Frequency — 10 MHz
SCKx
(CKP = 0)
SCKx
(CKP = 1)
SDOx
SDIx
73
74
75, 76
78
79
79
78
MSb LSb
bit 6 - - - - - - 1
LSb In
bit 6 - - - - 1
Note: Refer to Figure 26-2 for load conditions.
MSb In