Datasheet

PIC24F16KL402 FAMILY
DS31037B-page 136  2011 Microchip Technology Inc.
FIGURE 17-1: MSSP BLOCK DIAGRAM (SPI MODE)
FIGURE 17-2: SPI MASTER/SLAVE CONNECTION
( )
Read
Write
Internal Data Bus
SSPxSR
SSPM<3:0>
bit 0
Shift Clock
SSx
Control Enable
Edge
Select
Clock Select
TMR2 Output
T
OSC
Prescaler
4, 16, 64
2
Edge
Select
2
4
Data to TXx/RXx in SSPxSR
TRIS bit
2
SMP:CKE
SDOx
SSPxBUF
SDIx
SSx
SCKx
Note: Refer to the device data sheet for pin multiplexing.
Baud
Rate
Generator
SSPxADD<7:0>
7
Serial Input Buffer
(SSPxBUF)
Shift Register
(SSPxSR)
MSb
LSb
SDOx
SDIx
PROCESSOR 1
SCKx
SPI Master SSPM<3:0> = 00xx
Serial Input Buffer
(SSPxBUF)
Shift Register
(SSPxSR)
LSb
MSb
SDIx
SDOx
PROCESSOR 2
SCKx
SPI Slave SSPM<3:0> = 010x
Serial Clock