Datasheet

PIC18F97J94 FAMILY
DS30575A-page 98  2012 Microchip Technology Inc.
POSTINC2 64-pin 80-pin 100-pin N/A N/A N/A
POSTDEC2 64-pin 80-pin 100-pin N/A N/A N/A
PREINC2 64-pin 80-pin 100-pin N/A N/A N/A
PLUSW2 64-pin 80-pin 100-pin N/A N/A N/A
FSR2H 64-pin 80-pin 100-pin ---- xxxx ---- uuuu ---- uuuu
FSR2L 64-pin 80-pin 100-pin xxxx xxxx uuuu uuuu uuuu uuuu
STATUS 64-pin 80-pin 100-pin ---x xxxx ---u uuuu ---u uuuu
TMR0H 64-pin 80-pin 100-pin 0000 0000 uuuu uuuu uuuu uuuu
TMR0L 64-pin 80-pin 100-pin xxxx xxxx uuuu uuuu uuuu uuuu
T0CON 64-pin 80-pin 100-pin 1111 1111 1111 1111 uuuu uuuu
RESERVED 64-pin 80-pin 100-pin ---- ---- ---- ---- ---- ----
OSCCON 64-pin 80-pin 100-pin 0qqq -qqq uuuu -uuu uuuu -uuu
IPR5 64-pin 80-pin 100-pin -111 -111 -uuu -uuu -uuu -uuu
IOCF 64-pin 80-pin 100-pin 0000 0000 0000 0000 qqqq qqqq
RCON
(4)
64-pin 80-pin 100-pin 0-11 11qq 0-qq qquu u-qq qquu
TMR1H 64-pin 80-pin 100-pin xxxx xxxx uuuu uuuu uuuu uuuu
TMR1L 64-pin 80-pin 100-pin xxxx xxxx uuuu uuuu uuuu uuuu
T1CON 64-pin 80-pin 100-pin 0000 0000 uuuu uuuu uuuu uuuu
TMR2 64-pin 80-pin 100-pin 0000 0000 0000 0000 uuuu uuuu
PR2 64-pin 80-pin 100-pin 1111 1111 1111 1111 uuuu uuuu
T2CON 64-pin 80-pin 100-pin -000 0000 -000 0000 -uuu uuuu
SSP1BUF 64-pin 80-pin 100-pin xxxx xxxx uuuu uuuu uuuu uuuu
SSP1ADD 64-pin 80-pin 100-pin 0000 0000 0000 0000 uuuu uuuu
SSP1STAT 64-pin 80-pin 100-pin 0000 0000 0000 0000 uuuu uuuu
SSP1CON1 64-pin 80-pin 100-pin 0000 0000 0000 0000 uuuu uuuu
SSP1CON2 64-pin 80-pin 100-pin 0000 0000 0000 0000 uuuu uuuu
CMSTAT 64-pin 80-pin 100-pin ---- -xxx ---- -uuu ---- -uuu
ADCBUF0H 64-pin 80-pin 100-pin xxxx xxxx uuuu uuuu uuuu uuuu
ADCBUF0L 64-pin 80-pin 100-pin xxxx xxxx uuuu uuuu uuuu uuuu
ADCON1H 64-pin 80-pin 100-pin 0--- -000 u--- -uuu u--- -uuu
ADCON1L 64-pin 80-pin 100-pin 0000 -000 uuuu -uuu uuuu -uuu
CVRCONH 64-pin 80-pin 100-pin ---0 0000 ---u uuuu ---u uuuu
CVRCONL 64-pin 80-pin 100-pin 0000 ---0 uuuu ---u uuuu ---u
TABLE 5-3: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register Applicable Devices
Power-on Reset,
Brown-out
Reset
MCLR
Resets,
WDT Reset,
RESET Instruction,
Stack Resets
Wake-up via
WDT or Interrupt
Legend: u = unchanged; x = unknown; - = unimplemented bit, read as ‘0’; q = value depends on condition.
Shaded cells indicate that conditions do not apply for the designated device.
Note 1: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the
interrupt vector (0008h or 0018h).
3: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
4: See Table 5-2 for Reset value for specific condition.
5: Bits 7,6 are unimplemented on 64 and 80-pin devices.
6: If the V
BAT is always powered, the DSGPx register values will remain unchanged after the first POR.