Datasheet

2012 Microchip Technology Inc. DS30575A-page 97
PIC18F97J94 FAMILY
TABLE 5-3: INITIALIZATION CONDITIONS FOR ALL REGISTERS
Register Applicable Devices
Power-on Reset,
Brown-out
Reset
MCLR
Resets,
WDT Reset,
RESET Instruction,
Stack Resets
Wake-up via
WDT or Interrupt
TOSU 64-pin 80-pin 100-pin ---0 0000 ---0 0000 ---0 uuuu
(1)
TOSH 64-pin 80-pin 100-pin 0000 0000 0000 0000 uuuu uuuu
(1)
TOSL 64-pin 80-pin 100-pin 0000 0000 0000 0000 uuuu uuuu
(1)
STKPTR 64-pin 80-pin 100-pin 00-0 0000 uu-0 0000 uu-u uuuu
(1)
PCLATU 64-pin 80-pin 100-pin ---0 0000 ---0 0000 ---u uuuu
PCLATH 64-pin 80-pin 100-pin 0000 0000 0000 0000 uuuu uuuu
PCL 64-pin 80-pin 100-pin 0000 0000 0000 0000 PC + 2
(2)
TBLPTRU 64-pin 80-pin 100-pin --00 0000 --00 0000 --uu uuuu
TBLPTRH 64-pin 80-pin 100-pin 0000 0000 0000 0000 uuuu uuuu
TBLPTRL 64-pin 80-pin 100-pin 0000 0000 0000 0000 uuuu uuuu
TABLAT 64-pin 80-pin 100-pin 0000 0000 0000 0000 uuuu uuuu
PRODH 64-pin 80-pin 100-pin xxxx xxxx uuuu uuuu uuuu uuuu
PRODL 64-pin 80-pin 100-pin xxxx xxxx uuuu uuuu uuuu uuuu
INTCON 64-pin 80-pin 100-pin 0000 000x 0000 000x uuuu uuuu
(3)
INTCON2 64-pin 80-pin 100-pin 1111 1111 1111 1111 uuuu uuuu
(3)
INTCON3 64-pin 80-pin 100-pin 1100 0000 1100 0000 uuuu uuuu
(3)
INDF0 64-pin 80-pin 100-pin N/A N/A N/A
POSTINC0 64-pin 80-pin 100-pin N/A N/A N/A
POSTDEC0 64-pin 80-pin 100-pin N/A N/A N/A
PREINC0 64-pin 80-pin 100-pin N/A N/A N/A
PLUSW0 64-pin 80-pin 100-pin N/A N/A N/A
FSR0H 64-pin 80-pin 100-pin ---- xxxx ---- uuuu ---- uuuu
FSR0L 64-pin 80-pin 100-pin xxxx xxxx uuuu uuuu uuuu uuuu
WREG 64-pin 80-pin 100-pin xxxx xxxx uuuu uuuu uuuu uuuu
INDF1 64-pin 80-pin 100-pin N/A N/A N/A
POSTINC1 64-pin 80-pin 100-pin N/A N/A N/A
POSTDEC1 64-pin 80-pin 100-pin N/A N/A N/A
PREINC1 64-pin 80-pin 100-pin N/A N/A N/A
PLUSW1 64-pin 80-pin 100-pin N/A N/A N/A
FSR1H 64-pin 80-pin 100-pin ---- xxxx ---- uuuu ---- uuuu
FSR1L 64-pin 80-pin 100-pin xxxx xxxx uuuu uuuu uuuu uuuu
BSR 64-pin 80-pin 100-pin ---- 0000 ---- 0000 ---- uuuu
INDF2 64-pin 80-pin 100-pin N/A N/A N/A
Legend: u = unchanged; x = unknown; - = unimplemented bit, read as ‘0’; q = value depends on condition.
Shaded cells indicate that conditions do not apply for the designated device.
Note 1: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the
interrupt vector (0008h or 0018h).
3: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
4: See Table 5-2 for Reset value for specific condition.
5: Bits 7,6 are unimplemented on 64 and 80-pin devices.
6: If the V
BAT is always powered, the DSGPx register values will remain unchanged after the first POR.