Datasheet
2012 Microchip Technology Inc. DS30575A-page 77
PIC18F97J94 FAMILY
REGISTER 4-1: DSCONL: DEEP SLEEP CONTROL REGISTER LOW
REGISTER 4-2: DSCONH: DEEP SLEEP CONTROL REGISTER HIGH
U-0 U-0 U-0 U-0 U-0 R-0 R/W-0, HSC R/W-0, HS
— — — — — r DSBOR
(1)
RELEASE
(1)
bit 7 bit 0
Legend: r = Reserved bit HSC = Hardware Settable/Clearable bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
HS = Hardware Settable bit
bit 7-3 Unimplemented: Read as ‘0’
bit 2 Reserved: Maintained as ‘0’
bit 1 DSBOR: Deep Sleep BOR Event Status bit
(1)
1 = DSBOR was enabled and VDD dropped below the DSBOR threshold during Deep Sleep
(2)
0 = DSBOR disabled while device is in Deep Sleep mode
bit 0 RELEASE: I/O Pin State Release bit
(1)
Upon waking from Deep Sleep, the I/O pins maintain their previous states. Clearing this bit will release
the I/O pins and allow their respective TRIS and LAT bits to control their states.
Note 1: This is the value when V
DD is initially applied.
2: Unlike all other events, a Deep Sleep BOR event will not cause a wake-up from Deep Sleep; this bit is
present only as a status bit.
R/W-0 U-0 U-0 U-0 U-0 U-0 U-0 R/W-0, HS
(2)
DSEN
(
1
)
— — — — — —RTCCWDIS
bit 7 bit 0
Legend: HS = Hardware Settable bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 DSEN: Deep Sleep Mode Enable bit
(
1
)
1 = Deep Sleep mode is enabled and device will enter Deep Sleep mode when the SLEEP instruction
is executed
0 = Deep Sleep mode is not enabled
bit 6-1 Unimplemented: Read as ‘0’
bit 0 RTCCWDIS: RTCC Wake-up Disable bit
(2)
1 = Wake-up from RTCC is disabled
0 = Wake-up from RTCC is enabled
Note 1: In order to enter Deep Sleep, DSEN must be written to in two separate operations. The write operations
do not need to be consecutive. Before writing DSEN, the DSCON1 register should be cleared twice.
2: This is the value when VDD is initially applied.