Datasheet

 2012 Microchip Technology Inc. DS30575A-page 65
PIC18F97J94 FAMILY
4.0 POWER-MANAGED MODES
All PIC18F97J94 family devices offer a number of
built-in strategies for reducing power consumption.
These strategies can be particularly useful in applica-
tions, which are both power-constrained (such as
battery operation), yet require periods of full-power
operation for timing-sensitive routines (such as serial
communications).
Aside from their low-power architecture, these devices
include an expanded range of dedicated hardware
features that allow the microcontroller to reduce power
consumption to even lower levels when long-term
hibernation is required, and still be able to resume
operation on short notice.
The device has four power-saving features:
• Instruction-Based Power-Saving Modes
• Hardware-Based Power Reduction Features
• Microcontroller Clock Manipulation
• Selective Peripheral Control
Combinations of these methods can be used to selec-
tively tailor an application’s power consumption, while
still maintaining critical or timing-sensitive application
features. However, it is more convenient to discuss the
strategies separately.
4.1 Overview of Power-Saving Modes
In addition to full-power operation, otherwise known as
Run mode, PIC18F97J94 family devices offer three
instruction-based, power-saving modes and one hard-
ware-based mode. In descending order of power
consumption, they are:
•Idle
• Sleep (including retention Sleep)
• Deep Sleep (with and without retention)
•V
BAT (with and without RTCC)
By powering down all four modes, different functional
areas of the microcontroller allow progressive reduc-
tions of operating and Idle power consumption. In addi-
tion, three of the modes can be tailored for more power
reduction at a trade-off of some operating features.
Table 4-1 lists all of the operating modes (including Run
mode, for comparison) in order of increasing power
savings and summarizes how the microcontroller exits
the different modes.