Datasheet
2012 Microchip Technology Inc. DS30575A-page 57
PIC18F97J94 FAMILY
3.11 Internal Low-Power RC Oscillator
(LPRC)
The LPRC Oscillator is separate from the FRC and oscil-
lates at a nominal frequency of 31 kHz. LPRC is the
clock source for the Power-up Timer (PWRT), Watchdog
Timer (WDT) and FSCM circuits. It may also be used to
provide a low-frequency clock source option for the
device, in those applications where power consumption
is critical and timing accuracy is not required.
3.11.1 ENABLING THE LPRC OSCILLATOR
Since it serves the Power-up Timer (PWRT) clock
source, the LPRC Oscillator is enabled at POR events
whenever the on-board voltage regulator is disabled.
After the PWRT expires, the LPRC Oscillator will
remain on if any one of the following is true:
• The FSCM is enabled.
• The WDT is enabled.
• The LPRC Oscillator is selected as the system
clock (COSC<2:0> = 101).
If none of the above is true, the LPRC will shut off after
the PWRT expires.
3.12 Fail-Safe Clock Monitor (FSCM)
The Fail-Safe Clock Monitor (FSCM) allows the device
to continue to operate, even in the event of an oscillator
failure. The FSCM function is enabled by programming
the FSCMx (Clock Switch and Monitor) bits in
CONFIG3L<5:4>. FSCM is only enabled when the
FSCM<1:0> bits (CONFIG3L<5:4>) = 00. When FSCM
is enabled, the internal LPRC Oscillator will run at all
times (except during Sleep mode).
In the event of an oscillator failure, the FSCM will gener-
ate a clock failure trap and will switch the system clock
to the FRC Oscillator. The user will then have the option
to either attempt to restart the oscillator or execute a
controlled shutdown. FSCM will monitor the system
clock source regardless of its source or oscillator mode.
This includes the Primary Oscillator for all oscillator
modes and the Secondary Oscillator, SOSC, when
configured as the system clock.
The FSCM module takes the following actions when
switching to the FRC Oscillator:
1. The COSCx bits are loaded with ‘000’.
2. The CF status bit is set to indicate the clock
failure.
3.12.1 FSCM DELAY
On a POR, BOR or wake from Sleep mode event, a
nominal delay (T
FSCM) may be inserted before the
FSCM begins to monitor the system clock source. The
purpose of the FSCM delay is to provide time for the
oscillator and/or PLL to stabilize when the PWRT is not
utilized. The FSCM delay will be generated after the
internal System Reset signal, SYSRST
, has been
released. Refer to Section 28.4 “Fail-Safe Clock
Monitor” for FSCM delay timing information.
The T
FSCM interval is applied whenever the FSCM is
enabled and the EC, HS or SOSC Oscillator modes are
selected as the system clock.
3.12.2 FSCM AND SLOW OSCILLATOR
START-UP
If the chosen device oscillator has a slow start-up time
coming out of POR, BOR or Sleep mode, it is possible
that the FSCM delay will expire before the oscillator
has started. In this case, the FSCM will initiate a clock
failure trap. As this happens, the COSCx bits are
loaded with the FRC Oscillator selection. This will
effectively shut off the original oscillator that was trying
to start. The user can detect this situation and initiate a
clock switch back to the desired oscillator in the Trap
Service Routine (TSR).
3.12.3 FSCM AND WDT
The FSCM and the WDT both use the LPRC Oscillator
as their time base. In the event of a clock failure, the
WDT is unaffected and continues to run on the LPRC.
3.13 Clock Switching Operation
With few limitations, applications are free to switch
between any of the four clock sources (Primary, SOSC,
FRC and LPRC) under software control and at any
time. To limit the possible side effects that could result
from this flexibility, PIC18F devices have a safeguard
lock built into the switch process.
Note: For more information about the oscilla-
tor failure trap, refer to Section 10.0
“Interrupts”.
Note: Please refer to the “Electrical Character-
istics” section of the specific device data
sheet for TFSCM specification values.
Note: Primary Oscillator mode has three different
submodes (MS, HS and EC), which are
determined by the POSCMDx Configura-
tion bits. While an application can switch to
and from Primary Oscillator mode, in soft-
ware, it cannot switch between the different
primary submodes without reprogramming
the device.