Datasheet

PIC18F97J94 FAMILY
DS30575A-page 56  2012 Microchip Technology Inc.
3.9.2 SECONDARY OSCILLATOR
OPERATION
3.9.2.1 Continuous Operation
The SOSC is always running when any of the SOSCEN
bits are set. Leaving the oscillator running at all times
allows a fast switch to the 32 kHz system clock for
lower power operation. Returning to the faster main
oscillator still requires an oscillator start-up time if it is a
crystal-type source. This start-up time can be avoided
on PLL clock sources by setting the PLLEN bit
(OSCCON4<5>) in advance of switching the clock
source.
In addition, the oscillator will need to remain running at
all times for Real-Time Clock (RTC) application using
Timer1 or the RTCC module. Refer to Section 14.
“Timers” and Section 29. “Real-Time Clock and
Calendar (RTCC)” in the “PIC18F Family Reference
Manual” for further details.
3.9.2.2 Intermittent Operation
When all SOSCEN bits are cleared, the oscillator will
only operate when it is selected as the current device
clock source (COSC<2:0> = 100). It will be disabled
automatically if it is the current device clock source and
the device enters Sleep mode.
3.9.3 OPERATING MODES
3.9.3.1 Digital Mode
The SOSCO pin can also be configured to operate as a
digital clock input. The SOSCO pin is configured as a
digital input by setting SOSCSEL (CONFIG2L<3>) = 10.
When running in this mode, the SOSCO/SCLKI pin will
operate as a digital input to the oscillator section, while
the SOSCI pin will function as a port pin. The crystal
driving circuit is disabled. The Oscillator Configuration
Fuse bits (FOSC<2:0>) and New Oscillator Selection
bits (NOSC<2:0>) have no effect.
3.10 Internal Fast RC Oscillator (FRC)
The FRC Oscillator is a fast (8 MHz nominal), internal
RC Oscillator. This oscillator is intended to be a precise
internal RC Oscillator accurate enough to provide the
clock frequency necessary to maintain baud rate toler-
ance for serial data transmissions, without the use of
an external crystal or ceramic resonator. The PIC18F
device operates from the FRC Oscillator whenever the
COSCx bits are ‘111’, ‘110’, ‘001’ or ‘000’.
3.10.1 ENABLING THE FRC OSCILLATOR
Since it serves as the system clock during device initial-
ization, the FRC Oscillator is always enabled at a POR.
After the device is configured and PWRT expires, FRC
remains active only if it is selected as the device clock
source.
3.10.2 FRC POSTSCALER MODE (FRCDIV)
Users are not limited to the nominal 8 MHz FRC output
if they wish to use the Fast Internal Oscillator as a clock
source. An additional FRC mode, FRCDIV, implements
a selectable postscaler that allows the choice of a lower
clock frequency, from 7 different options, plus the direct
8 MHz output. The postscaler is configured using the
IRCF<2:0> bits (OSCCON3<2:0>). Assuming a
nominal 8 MHz output, available lower frequency
options range from 4 MHz (divide-by-2) to 31 kHz
(divide-by-256). The range of frequencies allows users
the ability to save power at any time in an application
by simply changing the IRCFx bits.
The FRCDIV mode is selected whenever the COSCx
bits are ‘111’.
3.10.3 FRC OSCILLATOR WITH PLL MODE
(FRCPLL)
The FRCPLL mode is selected whenever the COSCx
bits are ‘001’. In addition, this mode only functions when
the direct or divide-by-2 FRC postscaler options are
selected (IRCF<2:0> = 000 or 001).
When using the 4x or 8x PLL option, the output of the
FRC postscaler may also be combined with the PLL to
produce a nominal system clock of 16 MHz, 32 MHz or
64 MHz. Although somewhat less precise in frequency
than using the Primary Oscillator with a crystal or reso-
nator, it allows high-speed operation of the device
without the use of external oscillator components.
For devices with the basic 4x PLL block, the output of the
FRC postscaler block may also be combined with the
PLL to produce a nominal system clock of either 16 MHz
or 32 MHz. Although somewhat less precise in fre-
quency than using the Primary Oscillator with a crystal or
resonator, it still allows high-speed operation of the
device without the use of external oscillator components.
When using the 96 MHz PLL block, the output of the
FRC postscaler block may also be combined with the
PLL to produce a nominal system clock of either
4 MHz, 8 MHz, 16 MHz or 32 MHz. It also produces a
48 MHz USB clock; however, this USB clock must be
generated with the FRC Oscillator meeting the
frequency accuracy requirement of USB for proper
operation. Refer to the specific device data sheet for
details on the FRC Oscillator electrical characteristics.
In cases where the frequency accuracy is not met for
USB operation, the FRCPLL mode should not be used
when USB is active.
Note: Using FRC postscaler values, other than
‘000‘or ‘001‘, will cause the clock input to
the PLL to be below the operating
frequency input range and may cause
undesirable operation.