Datasheet

PIC18F97J94 FAMILY
DS30575A-page 488  2012 Microchip Technology Inc.
To minimize the effects of digital noise on the A/D
module operation, the user should select a conversion
trigger source that ensures the A/D conversion will take
place in Sleep mode. The automatic conversion trigger
option can be used for sampling and conversion in
Sleep (SSRC<3:0> = 0111). To use the automatic
conversion option, the ADON bit should be set in the
instruction prior to the SLEEP instruction.
22.11.3 A/D OPERATION DURING CPU IDLE
MODE
The ADSIDL bit (ADCON1H<5>) determines whether
the module stops or continues operation on Idle. If
ADSIDL = 0, the module will continue normal operation
when the device enters Idle mode. If the A/D interrupt
is enabled (ADIE = 1), the device will wake-up from Idle
mode when the A/D interrupt occurs. Program execu-
tion will resume at the A/D Interrupt Service Routine
(ISR). After the ISR completes execution will continue
from the instruction after the Sleep instruction that
placed the device in Idle mode.
If ADSIDL = 1, the module will stop in Idle. If the device
enters Idle mode in the middle of a conversion, the
conversion is aborted. The converter will not resume a
partially completed conversion on exiting from Idle
mode.
22.11.4 PERIPHERAL MODULE DISABLE
(PMD) REGISTER
The Peripheral Module Disable (PMD) registers
provide a method to disable the A/D module by stop-
ping all clock sources supplied to that module. When a
peripheral is disabled via the appropriate PMDx control
bit, the peripheral is in a minimum power consumption
state. The control and status registers associated with
the peripheral will also be disabled, so writes to those
registers will have no effect and read values will be
invalid. The A/D module is enabled only when the
ADCMD bit in the PMD3 register is cleared.
22.12 Design Tips
Question 1: How can I optimize the system perfor-
mance of the A/D Converter?
Answer: There are three main things to consider in
optimizing A/D performance:
1. Make sure you are meeting all of the timing
specifications. If you are turning the module off
and on, there is a minimum delay you must wait
before taking a sample. If you are changing
input channels, there is a minimum delay you
must wait for this as well, and finally, there is
TAD, which is the time selected for each bit
conversion. This is selected in AD1CON3 and
should be within a certain range, as specified in
Section 31.0 “Electrical Characteristics”. If
TAD is too short, the result may not be fully con-
verted before the con- version is terminated, and
if TAD is made too long, the voltage on the sam-
pling capacitor can decay before the conversion
is complete. These timing specifications are
provided in the “Electrical Characteristics”
section of the device data sheets.
2. Often, the source impedance of the analog
signal is high (greater than 2.5 k), so the
current drawn from the source by leakage, and
to charge the sample capacitor, can affect
accuracy. If the input signal does not change too
quickly, try putting a 0.1 uF capacitor on the
analog input. This capacitor will charge to the
analog voltage being sampled and supply the
instantaneous current needed to charge the
internal holding capacitor.
3. Put the device into Sleep mode before the start
of the A/D conversion. The RC clock source
selection is required for conversions in Sleep
mode. This technique increases accuracy,
because digital noise from the CPU and other
peripherals is minimized.
Question 2: Do you know of a good reference on
A/D Converters?
Answer: A good reference for understanding A/D
conversions is the “Analog-Digital Conversion
Handbook third edition, published by Prentice Hall
(ISBN 0-13-03-2848-0).
Question 3: My combination of channels/samples
and samples/interrupt is greater than the size of the
buffer. What will happen to the buffer?
Answer: This configuration is not recommended. The
buffer will contain unknown results.
22.13 Related Application Notes
This section lists application notes that are related to
this section of the data sheet. These application notes
may not be written specifically for the PIC18F device
family, but the concepts are pertinent and could be
used with modification and possible limitations. The
current application notes related to the 12-Bit A/D
Converter with Threshold Detect module are:
AN546, Using the Analog-to-Digital (A/D) Converter
(DS00546)
AN557, Four-Channel Digital Voltmeter with Display
and Keyboard (DS00557)
AN693, Understanding A/D Converter Performance
Specifications (DS00693)
Note: For the A/D module to operate in Sleep,
the A/D clock source must be set to RC
(ADRC = 1).
Note: Please visit the Microchip web site
(www.microchip.com) for additional
application notes and code examples for
the PIC18F family of devices.