Datasheet

PIC18F97J94 FAMILY
DS30575A-page 48  2012 Microchip Technology Inc.
REGISTER 3-8: REFOxCON2: REFERENCE CLOCK OUTPUT CONTROL REGISTER 2
R/W-0
(1)
R/W-0
(1)
R/W-0
(1)
R/W-0
(1)
R/W-0
(1)
R/W-0
(1)
R/W -0
(1)
R/W -0
(1)
RODIV7 RODIV6 RODIV5 RODIV4 RODIV3 RODIV2 RODIV1 RODIV0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at all Resets ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-0 RODIV<7:0>: Reference Clock Output Divider bits
(1)
Reserved for expansion of RODIV<15>.
Note 1: The RODIV register field should not be written while the ACTIVE (REFOxCON<0>) bit is ‘1’; Undefined
behavior will result.
REGISTER 3-9: REFOxCON3: REFERENCE CLOCK OUTPUT CONTROL REGISTER 3
U-0 R/W-0
(1)
R/W-0
(1)
R/W-0
(1)
R/W-0
(1)
R/W-0
(1)
R/W-0
(1)
R/W-0
(1)
— RODIV14 RODIV13 RODIV12 RODIV11 RODIV10 RODIV9 RODIV8
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at all Resets ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 Unimplemented: Read as ‘0’
bit 6-0 RODIV<14:8>: Reference Clock Output Divider bits
(1)
Used in conjunction with RODIV<7:0> to specify clock divider frequency.
111111111111111 = REFO clock is base clock frequency divided by 65,534 (32,767 * 2)
111111111111110 = REFO clock is base clock frequency divided by 65,532 (32,766 * 2)
•
•
•
000000000000011 = REFO clock is base clock frequency divided by 6 (3 * 2)
000000000000010 = REFO clock is base clock frequency divided by 4 (2 * 2)
000000000000001 = REFO clock is base clock frequency divided by 2 (1 * 2)
000000000000000 = REFO clock is the same frequency as the base clock (no divider)
Note 1: The RODIV register field should not be written while the ACTIVE (REFOxCON<0>) bit is ‘1’; undefined
behavior will result.