Datasheet

 2012 Microchip Technology Inc. DS30575A-page 477
PIC18F97J94 FAMILY
22.8.2 CONVERSION SEQUENCE
EXAMPLES
The following configuration examples show the A/D
operation in different sampling and buffering configura-
tions. In each example, setting the ASAM bit starts
automatic sampling. A conversion trigger ends
sampling and starts conversion.
22.8.2.1 Sampling and Converting a Single
Channel Multiple Times
In this case Figure 22-16, one A/D input, AN0, will be
sampled and converted. The results are stored in the
ADCBUFn buffer. This process repeats 16 times until
the buffer is full and then the module generates an
interrupt. The entire process will then repeat.
With the ALTS bit clear, only the MUX A inputs are
active. The CH0SAx and CH0NAx bits are specified
(AN0 - VR-) as the inputs to the Sample-and-Hold
channel. All other input selection bits are unused.
FIGURE 22-16: CONVERTING ONE CHANNEL 16 TIMES PER INTERRUPT
Conversion
A/D CLK
SAMP
ADC1BUF0
TSAMP
TCONV
BSF AD1CON1, ASAM
ADC1BUF1
DONE
ADC1BUFE
ADC1BUFF
Analog Input
AN0
TSAMP
TCONV
AN0
TSAMP
TCONV
AN0
TSAMP
TCONV
AN0
AD1IF
ASAM
Trigger
Instruction Execution