Datasheet

 2012 Microchip Technology Inc. DS30575A-page 47
PIC18F97J94 FAMILY
REGISTER 3-7: REFOxCON1: REFERENCE CLOCK OUTPUT CONTROL REGISTER 1
U-0 U-0 U-0 U-0 R/W-0
(1)
R/W-0
(1)
R/W-0
(1)
R/W-0
(1)
— — — — ROSEL3 ROSEL2 ROSEL1 ROSEL0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at all Resets ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-4 Unimplemented: Read as ‘0’
(Reserved for additional ROSEL bits.)
bit 3-0 ROSEL<3:0>: Reference Clock Output Source Select bits
(1)
Select one of the various clock sources to be used as the reference clock.
0111-1111 = Reserved
0110 = PLL (4/6/8x or 96 MHz)
0101 =SOSC
0100 =LPRC
0011 =FRC
0010 =POSC
0001 = Peripheral clock (reference clock reflects any peripheral clock switching)
0000 = System clock (reference clock reflects any device clock switching)
When PLLDIV<3:0> (CONFIG2H<3:0>) = 1111, ROSEL<3:0> should not be set to ‘0110’.
Note 1: The ROSEL register field should not be written while the ACTIVE (REFOxCON<0>) bit is ‘1’; undefined
behavior will result.