Datasheet

 2012 Microchip Technology Inc. DS30575A-page 461
PIC18F97J94 FAMILY
Conversion data stored in the ADCBUF registers will
also be maintained, including any threshold values
stored by the user. It may be necessary to re-initialize
these registers to their proper values before
re-enabling the module.
When enabling the module by setting the ADON bit, the
user must wait for the analog stages to stabilize. For
the stabilization time, refer to Section 31.0 “Electrical
Characteristics”.
22.4 Controlling the Sampling Process
22.4.1 MANUAL SAMPLING
Setting the SAMP bit (ADCON1L<1>) while the ASAM
bit (ADCON1L<2>) is clear causes the A/D to begin
sampling. Clearing the SAMP bit ends sampling and
automatically begins the conversion; however, there
must be a sufficient delay between setting and clearing
SAMP for the sampling process to start. Sampling will
not resume until the SAMP bit is once again set. For an
example, see Figure 22-4.
22.4.2 AUTOMATIC SAMPLING
Setting the ASAM bit causes the A/D to automatically
begin sampling after a conversion has been completed.
One of several options can be used as an event to end
sampling and complete the conversions. Sampling will
continue on the next selected channel after the conver-
sion in progress has completed. For an example, see
Figure 22-5.
22.4.3 MONITORING SAMPLE STATUS
The SAMP bit indicates the sampling state of the A/D.
Generally, when the SAMP bit clears, indicating the
end of sampling, the DONE bit is automatically cleared
to indicate the start of conversion. If SAMP is '0' while
DONE is '1', the A/D is in an inactive state.
22.4.4 ABORTING A SAMPLE
While in Manual Sampling mode, clearing the SAMP bit
will terminate sampling. If SSRC<3:0> = 0000, it may
also start a conversion automatically.
Clearing the ASAM bit while in Automatic Sampling
mode will not terminate an ongoing sample/convert
sequence; however, sampling will not automatically
resume after a subsequent conversion.
22.5 Controlling the Conversion
Process
The conversion trigger source will terminate sampling
and start a selected sequence of conversions. The
SSRC<3:0> bits (ADCON1L<7:4>) select the source of
the conversion trigger.
22.5.1 MANUAL CONTROL
When SSRC<3:0> = 0000, the conversion trigger is
under software control. Clearing the SAMP bit
(ADCON1L<1>) starts the conversion sequence.
Figure 22-4 is an example where setting the SAMP bit
initiates sampling, and clearing the SAMP bit
terminates sampling and starts conversion. The user
software must time the setting and clearing of the
SAMP bit to ensure adequate sampling time of the
input signal.
Figure 22-5 is an example where setting the ASAM bit
initiates automatic sampling, and clearing the SAMP bit
terminates sampling and starts conversion. After the
conversion completes, the module sets the SAMP bit
and returns to the sample state. The user software
must time the clearing of the SAMP bit to ensure
adequate sampling time of the input signal, under-
standing that the time since previously clearing the
SAMP bit includes the conversion time, which immedi-
ately follows, as well as the next sampling time.
Note 1: The available conversion trigger sources
may vary depending on the PIC18F
device variant. Refer to the specific
device data sheet for the available
conversion trigger sources.
2: The SSRCx selection bits should not be
changed when the A/D module is
enabled. If the user wishes to change
the conversion trigger source, disable the
A/D module first by clearing the ADON bit
(AD1CON1<15>).