Datasheet

 2012 Microchip Technology Inc. DS30575A-page 447
PIC18F97J94 FAMILY
REGISTER 22-11: ADCON5L: A/D CONTROL REGISTER 5 LOW
U-0 U-0 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0
— — — — WM1 WM0 CM1 CM0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-4 Unimplemented: Read as ‘0’
bit 3-2 WM<1:0>: Write Mode bits
11 = Reserved
10 = Auto-compare only (conversion results are not saved, but interrupts are generated when a valid
match occurs, as defined by the CM<1:0> and ASINTMD<1:0> bits)
01 = Convert and save (conversion results are saved to locations as determined by the register bits
when a match occurs, as defined by the CMx bits)
00 = Legacy operation (conversion data is saved to a location determined by the buffer register bits)
bit 1-0 CM<1:0>: Compare Mode bits
11 = Outside Window mode (valid match occurs if the conversion result is outside of the window, defined
by the corresponding buffer pair)
10 = Inside Window mode (valid match occurs if the conversion result is inside the window, defined by the
corresponding buffer pair)
01 = Greater Than mode (valid match occurs if the result is greater than the value in the corresponding
buffer register)
00 = Less Than mode (valid match occurs if the result is less than the value in the corresponding buffer
register)