Datasheet
PIC18F97J94 FAMILY
DS30575A-page 442 2012 Microchip Technology Inc.
REGISTER 22-5: ADCON1L: A/D CONTROL REGISTER 1 LOW
R/W-0 R/W-0 R/W-0 R/W-0 U-0 R/W-0 R/W-0, HSC R/C-0, HSC
SSRC3 SSRC2 SSRC1 SSRC0 — ASAM SAMP DONE
bit 7 bit 0
Legend: C = Clearable bit U = Unimplemented bit, read as ‘0’
R = Readable bit W = Writable bit HSC = Hardware Settable/Clearable bit
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-4 SSRC<3:0>: Sample Clock Source Select bits
1xxx = Unimplemented, do not use
0111 = The SAMP bit is cleared after SAMC<4:0> number of T
AD clocks following the SAMP bit being
set (Auto-Convert mode); no extended sample time is present
0110 = Unimplemented
0101 =TMR1
0100 =CTMU
0011 =TMR5
0010 =TMR3
0001 =INT0
0000 = The SAMP bit must be cleared by software to start conversion
bit 3 Unimplemented: Read as ‘0’
bit 2 ASAM: A/D Sample Auto-Start bit
1 = Sampling begins immediately after last conversion; SAMP bit is auto-set
0 = Sampling begins when SAMP bit is manually set
bit 1 SAMP: A/D Sample Enable bit
1 = A/D Sample-and-Hold amplifiers are sampling
0 = A/D Sample-and-Hold amplifiers are holding
bit 0 DONE: A/D Conversion Status bit
1 = A/D conversion cycle has completed
0 = A/D conversion has not started or is in progress