Datasheet
PIC18F97J94 FAMILY
DS30575A-page 436 2012 Microchip Technology Inc.
FIGURE 22-1: 12-BIT A/D CONVERTER BLOCK DIAGRAM (PIC18F97J94 FAMILY)
Note 1: AN16 through AN23 are implemented on 80-pin and 100-pin devices only.
Comparator
12-Bit SAR Conversion Logic
VREF+
DAC
AN(n-1)
ANn
(1)
AN8
AN9
AN4
AN5
AN6
AN7
AN0
AN1
AN2
AN3
VREF-
Sample Control
S/H
AVSS
AVDD
ADC1BUF0:
ADC1BUFn
(3)
AD1CON1
AD1CON2
AD1CON3
AD1CHS
AD1CHITL
AD1CHITH
Control Logic
Data Formatting
Input MUX Control
Conversion Control
Pin Config. Control
Internal Data Bus
16
VR+VR-
MUX A
MUX B
VINH
VINL
VINH
VINH
VINL
VINL
VR+
V
R-
VR Select
VBG
(2)
VBG/6
(2)
AD1CSSL
CTMU
(2)
V
DDCORE
(2)
AVSS
(2)
AVDD
(2)
AD1CON5
V
BG/2
(2)
VBG
AD1CSSH
AD1CTMENL
AD1CTMENH
AD1DMBUF
AD1CON4