Datasheet
2012 Microchip Technology Inc. DS30575A-page 43
PIC18F97J94 FAMILY
3.3.2 OSCCON3 – CLOCK DIVIDER
REGISTER (IRCF<2:0> BITS)
The IRCFx bits (OSCCON3<2:0>) select the postscaler
option for the FRC Oscillator output, allowing users to
choose a lower clock frequency than the nominal 8 MHz.
This option is described in more detail in Section 3.10.2
“FRC Postscaler Mode (FRCDIV)” and Section 3.10.3
“FRC Oscillator with PLL Mode (FRCPLL)”.
REGISTER 3-3: OSCCON3: OSCILLATOR CONTROL REGISTER 3
REGISTER 3-4: OSCCON4: OSCILLATOR CONTROL REGISTER 4
U-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0 R/W-1
— — — — —IRCF2
(1)
IRCF1
(1)
IRCF0
(1)
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-3 Unimplemented: Read as ‘0’
bit 2-0 IRCF<2:0>: Reference Clock Divider bits
(1)
000 = FRC divide-by-1
001 = FRC divide-by-2 (default)
010 = FRC divide-by-4
011 = FRC divide-by-8
100 = FRC divide-by-16
101 = FRC divide-by-32
110 = FRC divide-by-64
111 = FRC divide-by-256
Note 1: The default FRC divide-by setting on an 8-bit device corresponds to 1 MIPS operation.
R/W-0 R/W-0 R/W-0 U-0 U-0 U-0 U-0 U-0
CPDIV1 CPDIV0 PLLEN — — — — —
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-6 CPDIV<1:0>: USB System Clock Select bits (postscaler select from 64 MHz clock branch)
00 = Input clock/1
01 = Input clock/2
10 = Input clock/4
11 = Input clock/8
bit 5 PLLEN: PLL Enable bit
1 = PLL is enabled even though it is not requested by the CPU; provides ability to “warm-up” the PLL
and keep it running to avoid the PLL start-up time. This setting will force the PLL and associated
clock source to stay active in Sleep.
0 = PLL is disabled; PLL will be automatically turned on when SRC1 is selected, or when REFO1 or
REFO2 is enabled and using the PLL clock as its source. In either case, the PLL will require a
start-up time.
bit 4-0 Unimplemented: Read as ‘0’