Datasheet

 2012 Microchip Technology Inc. DS30575A-page 411
PIC18F97J94 FAMILY
21.0 ENHANCED UNIVERSAL
SYNCHRONOUS
ASYNCHRONOUS RECEIVER
TRANSMITTER (EUSART)
The Enhanced Universal Synchronous Asynchronous
Receiver Transmitter (EUSART) module is one of four
serial I/O modules. (Generically, the EUSART is also
known as a Serial Communications Interface or SCI.)
The EUSART can be configured as a full-duplex,
asynchronous system that can communicate with
peripheral devices, such as CRT terminals and
personal computers. It can also be configured as a
half-duplex synchronous system that can communicate
with peripheral devices, such as A/D or D/A integrated
circuits, serial EEPROMs, etc.
The Enhanced USART module implements additional
features, including automatic baud rate detection and
calibration, automatic wake-up on Sync Break recep-
tion and 12-bit Break character transmit. These make it
ideally suited for use in Local Interconnect Network bus
(LIN/J2602 bus) systems.
All members of the PIC18F97J94 family are equipped
with four independent EUSART modules, referred to as
EUSART1, EUSART2, EUSART3 and EUSART4.
They can be configured in the following modes:
• Asynchronous (full duplex) with:
- Auto-wake-up on character reception
- Auto-baud calibration
- 12-bit Break character transmission
• Synchronous – Master (half duplex) with
selectable clock polarity
• Synchronous – Slave (half duplex) with selectable
clock polarity
The Enhanced USART module has the following
enhancements over the AUSART module:
• Selectable 16-Bit Baud Rate Generator mode
• Interrupt on Sync Break character received;
allows an asynchronous wake-up from Sleep
• 12-Bit Break character transmit
• Auto-baud calibration on Sync character
• Clock polarity select for Synchronous mode
• Transmit and receive polarity select for
Asynchronous mode
• Receive Shift register empty status bit
• Local Interconnect Network (LIN/J2602) protocol
standard
The Enhanced USART module has the following IrDA
®
related enhancements over previous Enhanced
USART modules:
• 16x Baud Clock output for IrDA support
• IrDA encoder and decoder logic
The pins of EUSART1 through EUSART4 are multi-
plexed with functions using PPS-Lite. The TXx and
RXx pins of each EUSART can be individually
controlled using PPS-Lite registers, respectively.
Refer to Section 11.15 “PPS-Lite” for setting up
EUSART1 through EUSART4.
The operation of each Enhanced USART module is
controlled through seven registers:
• RCSTAx – EUSARTx Receive Status and Control
Register
• TXSTAx – EUSARTx Transmit Status and Control
Register
• BAUDCONx – Baud Rate Control Register
• SPBRGx – Baud Rate Generator Register
• SPBRGHx – Baud Rate Generator High Register
• RCREGx – EUSARTx Receive Data Register
• TXREGx – EUSARTx Transmit Data Register
These are detailed on the following pages in
Register 21-1, Register 21-2 and Register 21-3,
respectively.
Note: The EUSART control will automatically
reconfigure the pin from input to output as
needed.
Note: Throughout this section, references to
register and bit names that may be asso-
ciated with a specific EUSART module are
referred to generically by the use of ‘x’ in
place of the specific module number.
Thus, “RCSTAx” might refer to the
Receive Status register for either
EUSART1, EUSART2, EUSART3 or
EUSART4.