Datasheet

 2012 Microchip Technology Inc. DS30575A-page 37
PIC18F97J94 FAMILY
3.0 OSCILLATOR
CONFIGURATIONS
This section describes the PIC18F oscillator system
and its operation. The PIC18F oscillator system has the
following modules and features:
• A total of four external and internal oscillator
options as clock sources, providing up to
11 different clock modes
• An on-chip USB PLL block to provide a stable
48 MHz clock for the USB module, as well as a
range of frequency options for the system clock
• Software-controllable switching between various
clock sources
• Software-controllable postscaler for selective
clocking of CPU for system power savings
• A Fail-Safe Clock Monitor (FSCM) that detects
clock failure and permits safe application recovery
or shutdown
• A separate and independently configurable
system clock output for synchronizing external
hardware
A simplified diagram of the oscillator system is shown
in Figure 3-1.
FIGURE 3-1: PIC18F GENERAL SYSTEM CLOCK DIAGRAM
PIC18F97J94 Family
Secondary Oscillator
SOSCEN
Enable
Oscillator
SOSCO
SOSCI
Clock Source Option
for Other Modules
OSC1
OSC2
Primary Oscillator
MS, HS, EC
Peripherals
OSCCON3<2:0>
WDT, PWRT
8 MHz
FRCDIV
31 kHz (nominal)
FRC
Oscillator
SOSC
LPRC
Clock Control Logic
Fail-Safe
Clock
Monitor
FRC
(nominal)
8 MHz
4 MHz
PLL &
DIV
PLLDIV<3:0> CPDIV<1:0>
48 MHz USB Clock
USB PLL
Reference Clock
Generator
REFO
FRC
Active Clock
Control
Reference
from USB
D+/D-
REFOxCON2<7:0>
LPRC
Oscillator
MSPLL, HSPLL,
ECPLL, FRCPLL
Postscaler
FRCDIV 16
500 kHz
Tuning