Datasheet

 2012 Microchip Technology Inc. DS30575A-page 355

PIC18F97J94 FAMILY

R/HS/HC-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0

ACKTIM PCIE SCIE BOEN SDAHT SBCDE AHEN DHEN

bit 7 bit 0

Legend:

R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’

-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown

bit 7 ACKTIM: Acknowledge Time Status bit

Unused in SPI.

bit 6 PCIE: Stop Condition Interrupt Enable bit

(1)

1 = Enable interrupt on detection of Stop condition

0 = Stop detection interrupts are disabled

bit 5 SCIE: Start Condition Interrupt Enable bit

(1)

1 = Enable interrupt on detection of Start or Restart conditions

0 = Start detection interrupts are disabled

bit 4 BOEN: Buffer Overwrite Enable bit

(2)

1 = SSPBUF updates every time a new data byte is shifted in, ignoring the BF bit

0 = If a new byte is received with BF bit already set, SSPOV is set, and the buffer is not updated

bit 3 SDAHT: SDA Hold Time Selection bit

Unused in SPI.

bit 2 SBCDE: Slave Mode Bus Collision Detect Enable bit

Unused in SPI.

bit 1 AHEN: Address Hold Enable bit

Unused in SPI.

bit 0 DHEN: Data Hold Enable bit

Unused in SPI.

Note 1: This bit has no effect in Slave modes that Start and Stop condition detection is explicitly listed as enabled.

2: For daisy-chained SPI operation; allows the user to ignore all but the last received byte. SSPOV is still set

when a new byte is received and BF = 1, but hardware continues to write the most recent byte to

SSPxBUF.