Datasheet

PIC18F97J94 FAMILY
DS30575A-page 352  2012 Microchip Technology Inc.
20.3 SPI Mode
The SPI mode allows 8 bits of data to be synchronously
transmitted and received simultaneously. All four
modes of SPI are supported. To accomplish communi-
cation, three pins are typically used. These pins must
be assigned through the PPS-Lite Configuration
registers before use.
• Serial Data Out (SDOx) – Mapped to pin using
PPS-Lite Peripheral Output registers
• Serial Data In (SDIx) – Mapped to pin using
PPS-Lite Peripheral Input registers
• Serial Clock (SCKx) – Mapped to pin using
PPS-Lite Peripheral Input registers (for Slave
mode) or Peripheral Output registers (for Master
mode).
Additionally, a fourth pin may be used when in a Slave
mode of operation:
• Slave Select (SSx
) – Mapped through PPS-Lite
Peripheral Input registers
Figure 20-1 shows the block diagram of the MSSPx
module when operating in SPI mode.
FIGURE 20-1: MSSPx BLOCK DIAGRAM
(SPI MODE)
( )
Read Write
Internal
Data Bus
SSPxSR reg
SSPM<3:0>
bit 0
Shift
Clock
SSx
Control
Enable
Edge
Select
Clock Select
TMR2 Output
T
OSC
Prescaler
4, 16, 64
2
Edge
Select
2
4
Data to TXx/RXx in SSPxSR
TRIS bit
2
SMP:CKE
SDOx
SSPxBUF reg
SDIx
SSx
SCKx
Note: PPS-Lite signal names are used in this dia-
gram for the sake of brevity. Refer to the text
for a full list of multiplexed functions.