Datasheet
2012 Microchip Technology Inc. DS30575A-page 319
PIC18F97J94 FAMILY
REGISTER 18-2: CCPTMRS0: CCP TIMER SELECT 0 REGISTER
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
C3TSEL1 C3TSEL0 C2TSEL2 C2TSEL1 C2TSEL0 C1TSEL2 C1TSEL1 C1TSEL0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-6 C3TSEL<1:0>: CCP3 Timer Selection bits
00 = CCP3 is based off of TMR1/TMR2
01 = CCP3 is based off of TMR3/TMR4
10 = CCP3 is based off of TMR3/TMR6
11 = CCP3 is based off of TMR3/TMR8
bit 5-3 C2TSEL<2:0>: CCP2 Timer Selection bits
000 = CCP2 is based off of TMR1/TMR2
001 = CCP2 is based off of TMR3/TMR4
010 = CCP2 is based off of TMR3/TMR6
011 = CCP2 is based off of TMR3/TMR8
100 = Reserved; do not use
101 = Reserved; do not use
110 = Reserved; do not use
111 = Reserved; do not use
bit 2-0 C1TSEL<2:0>: CCP1 Timer Selection bits
000 = CCP1 is based off of TMR1/TMR2
001 = CCP1 is based off of TMR3/TMR4
010 = CCP1 is based off of TMR3/TMR6
011 = CCP1 is based off of TMR3/TMR8
100 = Reserved; do not use
101 = Reserved; do not use
110 = Reserved; do not use
111 = Reserved; do not use