Datasheet
PIC18F97J94 FAMILY
DS30575A-page 288 2012 Microchip Technology Inc.
15.3 Timer1/3/5 16-Bit Read/Write Mode
Timer1/3/5 can be configured for 16-bit reads and
writes (see Figure 15-3). When the RD16 control bit
(TxCON<1>) is set, the address for TMRxH is mapped
to a buffer register for the high byte of Timer1/3/5. A
read from TMRxL will load the contents of the high byte
of Timer1/3/5 into the Timerx High Byte Buffer register.
This provides users with the ability to accurately read
all 16 bits of Timer1/3/5 without having to determine
whether a read of the high byte, followed by a read of
the low byte, has become invalid due to a rollover
between reads.
A write to the high byte of Timer1/3/5 must also take
place through the TMRxH Buffer register. The
Timer1/3/5 high byte is updated with the contents of
TMRxH when a write occurs to TMRxL. This allows
users to write all 16 bits to both the high and low
bytes of Timer1/3/5 at once.
The high byte of Timer1/3/5 is not directly readable or
writable in this mode. All reads and writes must take
place through the Timerx High Byte Buffer register.
Writes to TMRxH do not clear the Timer1/3/5 prescaler.
The prescaler is only cleared on writes to TMRxL.
15.4 Using the SOSC Oscillator as the
Timer1/3/5 Clock Source
The SOSC Internal Oscillator may be used as the clock
source for Timer1/3/5. It can be enabled in one of these
ways:
• Setting the SOSCEN bit in either of the TxCON
registers (TxCON<3>)
• Setting the SOSCGO bit in the OSCCON2
register (OSCCON2<1>)
• Setting the NOSC bits to secondary clock source
in the OSCCON register (OSCCON<2:0> = 100)
The SOSCGO bit is used to warm up the SOSC so that
it is ready before any peripheral requests it.
To use it as the Timer3 clock source, the TMR3CSx bits
must also be set. As previously noted, this also config-
ures Timer3 to increment on every rising edge of the
oscillator source.
The SOSC Oscillator is described in Section 15.4
“Using the SOSC Oscillator as the Timer1/3/5 Clock
Source”.