Datasheet

PIC18F97J94 FAMILY
DS30575A-page 284  2012 Microchip Technology Inc.
15.0 TIMER1/3/5 MODULES
The Timer1/3/5 timer/counter modules incorporate
these features:
• Software-selectable operation as a 16-bit timer or
counter
• Readable and writable eight-bit registers (TMRxH
and TMRxL)
• Selectable clock source (internal or external) with
device clock or SOSC Oscillator internal options
• Interrupt-on-overflow
• Module Reset on ECCP Special Event Trigger
A simplified block diagram of the Timer1/3/5 module is
shown in Figure 15-1.
The Timer1/3/5 module is controlled through the
TxCON register (Register 15-1). It also selects the
clock source options for the ECCP modules. (For more
information, see Section 18.1.1 “ECCP Module and
Timer Resources”).
The F
OSC clock source should not be used with the
ECCP capture/compare features. If the timer will be
used with the capture or compare features, always
select one of the other timer clocking options.
Note: Throughout this section, generic references
are used for register and bit names that are the
same – except for an ‘x’ variable that indicates
the item’s association with the Timer1, Timer3
or Timer5 module. For example, the control
register is named TxCON and refers to
T1CON, T3CON and T5CON.