Datasheet

 2012 Microchip Technology Inc. DS30575A-page 265
PIC18F97J94 FAMILY
13.12 LCD Waveform Generation
LCD waveform generation is based on the philosophy
that the net AC voltage across the dark pixel should be
maximized and the net AC voltage across the clear
pixel should be minimized. The net DC voltage across
any pixel should be zero.
The COM signal represents the time slice for each
common, while the SEG contains the pixel data.
The pixel signal (COM-SEG) will have no DC compo-
nent and can take only one of the two rms values. The
higher rms value will create a dark pixel and a lower
rms value will create a clear pixel.
As the number of commons increases, the delta
between the two rms values decreases. The delta rep-
resents the maximum contrast that the display can
have.
The LCDs can be driven by two types of waveforms:
Type-A and Type-B. In a Type-A waveform, the phase
changes within each common type, whereas a Type-B
waveform’s phase changes on each frame boundary.
Thus, Type-A waveforms maintain 0 VDC over a single
frame, whereas Type-B waveforms take two frames.
Figure 13-9 through Figure 13-21 provide waveforms
for static, half-multiplex, one-third multiplex and quarter
multiplex drives for Type-A and Type-B waveforms.
FIGURE 13-9: TYPE-A/TYPE-B WAVEFORMS IN STATIC DRIVE
Note: If Sleep has to be executed with LCD Sleep
enabled (SLPEN (LCDCON<6>) = 1),
care must be taken to execute Sleep only
when VDC on all the pixels is ‘0’.
V
1
V
0
COM0
SEG0
COM0-SEG0
COM0-SEG1
SEG1
V
1
V
0
V
1
V
0
V
0
V
1
-V
1
V
0
1 Frame
COM0
SEG0 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7