Datasheet

 2012 Microchip Technology Inc. DS30575A-page 249
PIC18F97J94 FAMILY
13.2 LCD Segment Pins Configuration
The LCDSEx registers configure the functions of the
port pins. Setting the segment enable bit for a particular
segment configures that pin as an LCD driver. There
are four LCD Segment Enable registers, as shown in
Table 13-1. The prototype LCDSEx register is shown in
Register 13-4.
Once the module is initialized for the LCD panel, the
individual bits of the LCDDATAx registers are cleared
or set to represent a clear or dark pixel, respectively.
Specific sets of LCDDATA registers are used with
specific segments and common signals. Each bit rep-
resents a unique combination of a specific segment
connected to a specific common.
Individual LCDDATA bits are named by the convention,
“SxxCy”, with “xx” as the segment number and “y” as
the common number. The relationship is summarized
in Register 13-3. The prototype LCDDATAx register is
shown in Register 13-5.
REGISTER 13-4: LCDSEx: LCD SEGMENT x ENABLE REGISTER
TABLE 13-1: LCDSEx REGISTERS AND ASSOCIATED SEGMENTS
Register Segments
LCDSE0 Seg 7:Seg 0
LCDSE1 Seg 15:Seg 8
LCDSE2 Seg 23:Seg 16
LCDSE3 Seg 31:Seg 24
LCDSE4 Seg 39:Seg 32
LCDSE5 Seg 47:Seg 40
LCDSE6 Seg 55:Seg 48
LCDSE7 Seg 63:Seg 56
Note: Not all LCDSEx and LCDDATAx registers
are implemented in lower pin count
devices. Refer to the specific device data
sheet for more details.
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
SE(n) SE(n) SE(n) SE(n) SE(n) SE(n) SE(n) SE(n)
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-0 SE(n): Segment Enable bits
For LCDSE0: n = 0-7
For LCDSE1: n = 8-15
For LCDSE2: n = 16-23
For LCDSE3: n = 24-31
For LCDSE0: n = 32-39
For LCDSE0: n = 40-47
For LCDSE0: n = 48-55
For LCDSE0: n = 56-63
1 = Segment function of the pin is enabled, digital I/O is disabled
0 = Segment function of the pin is disabled, digital I/O is enabled