Datasheet

 2012 Microchip Technology Inc. DS30575A-page 247
PIC18F97J94 FAMILY
REGISTER 13-2: LCDREG: LCD CHARGE PUMP CONTROL REGISTER
R/W-0 U-0 RW-1 RW-1 RW-1 RW-1 RW-0 RW-0
CPEN
— BIAS2 BIAS1 BIAS0 MODE13 CLKSEL1 CLKSEL0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 CPEN: 3.6V Charge Pump Enable bit
1 = The regulator generates the highest (3.6V) voltage
0 = Highest voltage in the system is supplied externally (V
DD)
bit 6 Unimplemented: Read as ‘0’
bit 5-3 BIAS<2:0>: Regulator Voltage Output Control bits
111 = 3.60V peak (offset on LCDBIAS0 of 0V)
110 = 3.47V peak (offset on LCDBIAS0 of 0.13V)
101 = 3.34V peak (offset on LCDBIAS0 of 0.26V)
100 = 3.21V peak (offset on LCDBIAS0 of 0.39V)
011 = 3.08V peak (offset on LCDBIAS0 of 0.52V)
010 = 2.95V peak (offset on LCDBIAS0 of 0.65V)
001 = 2.82V peak (offset on LCDBIAS0 of 0.78V)
000 = 2.69V peak (offset on LCDBIAS0 of 0.91V)
bit 2 MODE13: 1/3 LCD BIAS Enable bit
1 = Regulator output supports 1/3 LCD BIAS mode
0 = Regulator output supports Static LCD BIAS mode
bit 1-0 CLKSEL<1:0>: Regulator Clock Select Control bits
11 =LPRC
10 =FRC
01 =SOSC
00 = Disable regulator and float regulator voltage output.