Datasheet

 2012 Microchip Technology Inc. DS30575A-page 237
PIC18F97J94 FAMILY
12.1 DSM Operation
The DSM module can be enabled by setting the MDEN
bit in the MDCON register. Clearing the MDEN bit in the
MDCON register disables the DSM module by auto-
matically switching the Carrier High and Carrier Low
signals to the V
SS signal source. The Modulator signal
source is also switched to the MDBIT in the MDCON
register. This not only assures that the DSM module is
inactive, but that it is also consuming the least amount
of current.
The Modulation Carrier High and Modulation Carrier
Low Control registers are not affected when the MDEN
bit is cleared, and the DSM module is disabled. The
values inside these registers remain unchanged while
the DSM is inactive. The sources for the Carrier High,
Carrier Low and Modulator signals will once again be
selected when the MDEN bit is set, and the DSM
module is again enabled and active.
The modulated output signal can be disabled without
shutting down the DSM module. The DSM module will
remain active and continue to mix signals, but the out-
put value will not be sent to the MDOUT pin. During the
time that the output is disabled, the MDOUT pin will
remain low. The modulated output can be disabled by
clearing the MDOE bit in the MDCON register.
12.2 Modulator Signal Sources
The Modulator signal can be supplied from the following
sources:
• ECCP1 Signal
• ECCP2 Signal
• ECCP3 Signal
• CCP2 Signal
• CCP3 Signal
• CCP4 Signal
• CCP5 Signal
• CCP6 Signal
• CCP7 Signal
• CCP8 Signal
• MSSP1 SDO Signal (SPI mode only)
• MSSP2 SDO Signal (SPI mode only)
• EUSART1 TX1 Signal
• EUSART2 TX2 Signal
• EUSART3 TX3 Signal
• EUSART4 TX4 Signal
• External Signal on MDMIN Pin (RF0/MDMIN)
• MDBIT bit in the MDCON Register
The Modulator signal is selected by configuring the
MDSRC<3:0> bits in the MDSRC register.
12.3 Carrier Signal Sources
The Carrier High signal and Carrier Low signal can be
supplied from the following sources:
• ECCP1 Signal
• ECCP2 Signal
• ECCP3 Signal
• CCP5 Signal
• CCP6 Signal
• CCP7 Signal
• CCP8 Signal
• CCP9 Signal
• CCP10 Signal
• Reference Clock Output Module Signal (REFO1)
• Reference Clock Output Module Signal (REFO2)
•System Clock
• External Signals on the MDCIN1 and MDCIN2
pins are available though PPS. Refer to
Section 11.15 “PPS-Lite” for setup.
•V
SS
The Carrier High signal is selected by configuring the
MDCH<3:0> bits in the MDCARH register. The Carrier
Low signal is selected by configuring the MDCL<3:0>
bits in the MDCARL register.
12.4 Carrier Synchronization
During the time when the DSM switches between
Carrier High and Carrier Low signal sources, the carrier
data in the modulated output signal can become
truncated. To prevent this, the carrier signal can be
synchronized to the Modulator signal. When synchroni-
zation is enabled, the carrier pulse that is being mixed
at the time of the transition is allowed to transition low
before the DSM switches over to the next carrier
source.
Synchronization is enabled separately for the Carrier
High and Carrier Low signal sources. Synchronization
for the Carrier High signal can be enabled by setting
the MDCHSYNC bit in the MDCARH register. Synchro-
nization for the Carrier Low signal can be enabled by
setting the MDCLSYNC bit in the MDCARL register.
Figure 12-1 through Figure 12-6 show timing diagrams
using various synchronization methods.