Datasheet

 2012 Microchip Technology Inc. DS30575A-page 231
PIC18F97J94 FAMILY
TABLE 11-14: PPS-LITE OUTPUT
PPS-Lite Output Peripheral Group 4n PPS-Lite Output Peripheral Group 4n + 1
(1) To Map this RPn Pin (4) to the Associated RPOR Register (1) To Map this RPn Pin (4) to the Associated RPOR Register
RP0 RPOR0_1<3:0> RP1 RPOR0_1<7:4>
RP4 RPOR4_5<3:0> RP5 RPOR4_5<7:4>
RP8 RPOR8_9<3:0> RP9 RPOR8_9<7:4>
RP12 RPOR12_13<3:0> RP13 RPOR12_13<7:4>
RP16 RPOR16_17<3:0> RP17 RPOR16_17<7:4>
RP20 RPOR20_21<3:0> RP21 RPOR20_21<7:4>
RP24 RPOR24_25<3:0> RP25 RPOR24_25<7:4>
RP28 RPOR28_29<3:0> RP29 RPOR28_29<7:4>
RP32 RPOR32_33<3:0> RP33 RPOR32_33<7:4>
RP36 RPOR36_37<3:0> RP37 RPOR36_37<7:4>
RP40 RPOR40_41<3:0> RP41 RPOR40_41<7:4>
RP44 RPOR44_45<3:0> RP45 RPOR44_45<7:4>
(2) with this Output Signal (3) Write this Corresponding Value (2) with this Output Signal (3) Write this Corresponding Value
Disabled h’0 Disabled h’0
U2BCLK h’1 U1BCLK h’1
U3RX_DT h’2 U3TX_CK h’2
U4RX_DT h’3 U4TX_CK h’3
SDO2 h’4 SDO1 h’4
P1D h’5 P1C h’5
P2D h’6 P2C h’6
P3B h’7 P3C h’7
CTPLS h’8 CCP7 h’8
CCP5 h’9 CCP9 h’9
CCP8 h’A C2OUT h’A
C1OUT h’B Unused h’B
Unused h’C Unused h’C
PBIO0 h’D PBIO1 h’D
PBIO4 h’E PBIO5 h’E
Reserved h’F Reserved h’F