Datasheet

 2012 Microchip Technology Inc. DS30575A-page 229
PIC18F97J94 FAMILY
11.15.3.2 Output Mapping
In contrast to the inputs, the outputs of the Peripheral
Pin Select options are mapped on the basis of the pin.
In this case, a bit field associated with a particular pin
dictates the peripheral output to be mapped. The
RPORx registers contain sets of 4-bit fields, with each
associated with one RPn pin (see Register 11-5). The
value of the bit field corresponds to one of the periph-
erals and that peripheral’s output is mapped to the pin.
Each pin has a limited set of peripherals to choose
from.
The PPS-Lite peripheral outputs and associated RPn
pins have been organized into four groups. It is not
possible to map a peripheral to an RPn pin which is out-
side of its group. To map a peripheral output signal to
an RPn pin, use the 4-step process, as indicated in
Table 11-14. Choose the RPn pin and the signal; the
column on the right shows which value to write to the
associated RPORx register.
The peripheral outputs that support Peripheral Pin
Selection have no default pins. Since the RPORx reg-
isters reset to all ‘0’s, the outputs are all disconnected
in the device’s default (Reset) state.
The list of peripherals for output mapping also includes
a null value of b’0000’ because of the mapping
technique. This allows unused peripherals to not be
connected to a pin. Not all peripherals are available on
all pins. For example, the “SDO2” signal is only avail-
able on RP0, RP4, RP8, etc. The “SDO2” signal is not
available on RP1.
PPS-Lite Input Peripheral Group 4n + 2 PPS-Lite Input Peripheral Group 4n + 3
(1) To Map this Signal (4) to the Associated RPIN Register (1) To Map this Signal (4) to the Associated RPIN Register
SS1
RPINR10_11<3:0> SS2 RPINR12_13<7:4>
INT2 RPINR26_27<7:4> INT3 RPINR28_29<3:0>
IOC2 RPINR20_21<3:0> IOC3 RPINR20_21<7:4>
IOC6 RPINR24_25<3:0> IOC7 RPINR24_25<7:4>
MDMIN RPINR28_29<7:4> U1RX RPINR0_1<3:0>
U1TX RPINR0_1<7:4> U2TX RPINR2_3<7:4>
U2RX RPINR2_3<3:0> SCK1 RPINR8_9<3:0>
SCK2 RPINR10_11<7:4> ECCP1 RPINR14_15<7:4>
ECCP3 RPINR16_17<7:4> ECCP2 RPINR16_17<3:0>
CCP6 RPINR34_35<3:0> CCP4 RPINR32_33<3:0>
CCP10 RPINR38_39<3:0> PBIO3 RPINR48_49<7:4>
PBIO2 RPINR48_49<3:0> PBIO7 RPINR52_53<7:4>
PBIO6 RPINR52_53<3:0>
(2) with this RPn Pin (3) Write this Corresponding Value (2) with this RPn Pin (3) Write this Corresponding Value
RP2 h’0 RP3 h’0
RP6 h’1 RP7 h’1
RP10 h’2 RP11 h’2
RP14 h’3 RP15 h’3
RP18 h’4 RP19 h’4
RP22 h’5 RP23 h’5
RP26 h’6 RP27 h’6
RP30 h’7 RP31 h’7
RP34 h’8 RP35 h’8
RP38 h’9 RP39 h’9
RP42 h’A RP43 h’A
RP46 h’B — h’B
— h’C — h’C
— h’D — h’D
— h’E — h’E
V
SS h’F VSS h’F
TABLE 11-13: RPIN REGISTERS AND AVAILABLE FUNCTIONS (CONTINUED)