Datasheet

 2012 Microchip Technology Inc. DS30575A-page 215
PIC18F97J94 FAMILY
11.9 PORTH, LATH and
TRISH Registers
PORTH is an 8-bit wide, bidirectional I/O port. The
corresponding Data Direction and Output Latch registers
are TRISH and LATH.
All pins on PORTH are implemented with Schmitt
Trigger input buffers. Each pin is individually
configurable as an input or output.
EXAMPLE 11-8: INITIALIZING PORTH
Note: PORTH is available only on 80-pin and
100-pin devices.
CLRF PORTH ; Initialize PORTH by
; clearing output
; data latches
CLRF LATH ; Alternate method
; to clear output
; data latches
BANKSEL ANCON2 ; Select bank with ANCON2 register
MOVLW 0Fh ; Configure PORTH as
MOVWF ANCON2 ; digital I/O
MOVLW 0Fh ; Configure PORTH as
MOVWF ANCON1 ; digital I/O
BANKSEL TRISH ; Select bank with TRISH register
MOVLW 0CFh ; Value used to
; initialize data
; direction
MOVWF TRISH ; Set RH3:RH0 as inputs
; RH5:RH4 as outputs
; RH7:RH6 as inputs
TABLE 11-8: PORTH FUNCTIONS
Pin Name Function
TRIS
Setting
I/O I/O Type Description
RH0/AN23/
SEG47/A16
RH0 0 O DIG LATH<0> data output; not affected by analog input.
1 I ST PORTH<0> data input.
AN23 1 I ANA A/D Input Channel 23. Default input configuration on POR; does not
affect digital output.
SEG47 0 O ANA LCD Segment 47 output; disables all other pin functions.
A16 x O DIG External Memory Bus Address<16> output.
RH1/AN22/
SEG46/A17
RH1 0 O DIG LATH<1> data output; not affected by analog input.
1 I ST PORTH<1> data input.
AN22 1 I ANA A/D Input Channel 22. Default input configuration on POR; does not
affect digital output.
SEG46 0 O ANA LCD Segment 46 output; disables all other pin functions.
A17 x O DIG External Memory Bus Address<17> output.
RH2/AN21/
SEG45/A18
RH2 0 O DIG LATH<2> data output; not affected by analog input.
1 I ST PORTH<2> data input.
AN21 1 I ANA A/D Input Channel 21. Default input configuration on POR; does not
affect digital output.
SEG45 0 O ANA LCD Segment 45 output; disables all other pin functions.
A18 x O DIG External Memory Bus Address<18> output.
RH3/AN20/
SEG44/A19
RH3 0 O DIG LATH<3> data output; not affected by analog input.
1 I ST PORTH<3> data input.
AN20 1 I ANA A/D Input Channel 20. Default input configuration on POR; does not
affect digital output.
SEG44 0 O ANA LCD Segment 44 output; disables all other pin functions.
A19 x O DIG External Memory Bus Address<19> output.
RH4/C2INC/
AN12/SEG40
RH4 0 O DIG LATH<4> data output; not affected by analog input.
1 I ST PORTH<4> data input; disabled when analog input is enabled.
C2INC 1 I ANA Comparator 2 Input C.
AN12 1 I ANA A/D Input Channel 12. Default input configuration on POR; does not
affect digital output.
SEG40 0 O ANA LCD Segment 40 output; disables all other pin functions.
Legend: O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Trigger Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).