Datasheet

 2012 Microchip Technology Inc. DS30575A-page 205
PIC18F97J94 FAMILY
11.4 PORTC, LATC and TRISC
Registers
PORTC is an eight-bit wide, bidirectional port. The
corresponding Data Direction and Output Latch registers
are TRISC and LATC. Only PORTC pins, RC2 through
RC7, are digital only pins. The pins have Schmitt Trigger
input buffers.
When enabling peripheral functions, use care in defin-
ing TRIS bits for each PORTC pin. Some peripherals
can override the TRIS bit to make a pin an output or
input. Consult the corresponding peripheral section for
the correct TRIS bit settings.
The contents of the TRISC register are affected by
peripheral overrides. Reading TRISC always returns
the current contents, even though a peripheral device
may be overriding one or more of the pins.
EXAMPLE 11-3: INITIALIZING PORTC
Note: These pins are configured as digital inputs
on any device Reset.
CLRF PORTC ; Initialize PORTC by
; clearing output
; data latches
CLRF LATC ; Alternate method
; to clear output
; data latches
MOVLW 0CFh ; Value used to
; initialize data
; direction
MOVWF TRISC ; Set RC<3:0> as inputs
; RC<5:4> as outputs
; RC<7:6> as inputs
TABLE 11-3: PORTC FUNCTIONS
Pin Name Function
TRIS
Setting
I/O
I/O
Type
Description
RC0/
PWRLCLK/
SCLKI/SOSCO
RC0 0 O DIG LATC<0> data output.
1 I ST PORTC<0> data input.
PWRLCLK 1 I ST Optional RTCC input from power line clock (50 or 60 Hz).
SCLKI x I ST Digital SOSC input.
SOSCO x O ANA Secondary Oscillator (SOSC) feedback output connection.
RC1/SOSCI RC1 0 O DIG LATC<1> data output.
1 I ST PORTC<1> data input.
SOSCI x I ANA Secondary Oscillator (SOSC) input connection.
RC2/CTED7/
RP11/AN9/
SEG13
RC2 0 O DIG LATC<2> data output; not affected by analog input.
1 I ST PORTC<2> data input; disabled when analog input is enabled.
CTED7 1 I ST CTMU Edge 7 input.
RP11 x x DIG Reconfigurable Pin 11 for PPS-Lite; TRIS must be set to match input/output of
module.
AN9 1 I ANA A/D Input Channel 9. Default input configuration on POR; does not affect digital
output.
SEG13 0 O ANA LCD Segment 13 output; disables all other pin functions.
RC3/CTED8/
RP15/SCL1/
SEG17
RC3 0 O DIG LATC<3> data output.
1 I ST PORTC<3> data input.
CTED8 1 I ST CTMU Edge 8 input.
RP15 x x DIG Reconfigurable Pin 15 for PPS-Lite; TRIS must be set to match input/output of
module.
SCL1 x I/O I2C Synchronous serial clock input/output for I
2
C™ mode.
SEG17 0 O ANA LCD Segment 17 output; disables all other pin functions
RC4/CTED9/
RP17/SDA1/
SEG16
RC4 0 O DIG LATC<4> data output.
1 I ST PORTC<4> data input.
CTED9 1 I ST CTMU Edge 9 input.
RP17 x x DIG Reconfigurable Pin 17 for PPS-Lite; TRIS must be set to match input/output of
module.
SDA1 x I/O I2C I
2
C™ mode data I/O
SEG16 0 O ANA LCD Segment 16 output; disables all other pin functions.
Legend: O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Trigger Buffer Input, I2C = I
2
C™/SMBus,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).