Datasheet

PIC18F97J94 FAMILY
DS30575A-page 204  2012 Microchip Technology Inc.
RB4/CTED3/RP12/
SEG11
RB4 0 O DIG LATB<4> data output.
1 I ST PORTB<4> data input.
CTED3 1 I ST CTMU Edge 3 input.
RP12 x x DIG Reconfigurable Pin 12 for PPS-Lite; TRIS must be set to match
input/output of module.
SEG11 0 O ANA LCD Segment 11 output; disables all other pin functions.
RB5/CTED4/RP13/
SEG8
RB5 0 O DIG LATB<5> data output.
1 I ST PORTB<5> data input.
CTED4 1 I ST CTMU Edge 4 input.
RP13 x x DIG Reconfigurable Pin 13 for PPS-Lite; TRIS must be set to match
input/output of module.
SEG8 0 O ANA LCD Segment 8 output; disables all other pin functions.
RB6/CTED5/PGC RB6 0 O DIG LATB<6> data output.
1 I ST PORTB<6> data input.
CTED5 1 I ST CTMU Edge 5 input.
PGC x I ST Serial execution (ICSP™) clock input for ICSP and ICD
operations.
RB7/CTED6/PGD RB7 0 O DIG LATB<7> data output.
1 I ST PORTB<7> data input.
CTED6 1 I ST CTMU Edge 6 input.
PGD x I/O ST/DIG Serial execution (ICSP™) data input/output for ICSP and ICD
operations.
TABLE 11-2: PORTB FUNCTIONS (CONTINUED)
Pin Name Function
TRIS
Setting
I/O
I/O
Type
Description
Legend: O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Trigger Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).